[PATCH 1/2] ARM: imx: imx8m: Add 933 MHz PLL settings

[Peng Fan (OSS)]

On 2022/2/26 11:37, Marek Vasut wrote:
> Add settings for operating PLL at 933 MHz. This setting is useful in
> case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.

Is the DDR operation value get from NXP DDR TOOL?

Thanks,
Peng.

> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Fabio Estevam <festevam at denx.de>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Stefano Babic <sbabic at denx.de>
> ---
>   arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
> index 76132defc21..4db55f86081 100644
> --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
> +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
> @@ -48,6 +48,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
>   #ifdef CONFIG_SPL_BUILD
>   static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {
>   	PLL_1443X_RATE(1000000000U, 250, 3, 1, 0),
> +	PLL_1443X_RATE(933000000U, 311, 4, 1, 0),
>   	PLL_1443X_RATE(800000000U, 300, 9, 0, 0),
>   	PLL_1443X_RATE(750000000U, 250, 8, 0, 0),
>   	PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
>