[PATCH v4] wdt: nuvoton: Add support for Nuvoton

[Michael Walle]

> On Tue, 15 Mar 2022 10:14:16 +0800
> Jim Liu <jim.t90615 at gmail.com> wrote:
> 
> > Add watchdog controller driver for NPCM7xx/npcm8xx
> >=20
> > Signed-off-by: Jim Liu <JJLIU0 at nuvoton.com>
> > Reviewed-by: Stefan Roese <sr at denx.de>
> >=20
> > Changes for v4:
> >    - add a bit of detail about the device in Kconfig
> >    - lower-case hex change
> >    - remove the  reset function delay.Actually when
> >      setting writel NPCM_WTR the watchdog is resetting the BMC
> > ---
> >  drivers/watchdog/Kconfig    |   8 +++
> >  drivers/watchdog/Makefile   |   1 +
> >  drivers/watchdog/npcm_wdt.c | 117 ++++++++++++++++++++++++++++++++++++
> >  3 files changed, 126 insertions(+)
> >  create mode 100644 drivers/watchdog/npcm_wdt.c
> >=20
> > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> > index f90f0ca02b..d33882fb6a 100644
> > --- a/drivers/watchdog/Kconfig
> > +++ b/drivers/watchdog/Kconfig
> > @@ -196,6 +196,14 @@ config WDT_MTK
> >  	  The watchdog timer is stopped when initialized.
> >  	  It performs full SoC reset.
> > =20
> > +config WDT_NPCM
> > +	bool "Nuvoton watchdog timer support"
> > +	depends on WDT && ARCH_NPCM
> > +	help
> > +	  This enables Nuvoton npcm7xx/npcm8xx watchdog timer driver,
> > +	  The watchdog timer is stopped when initialized.
> > +	  It performs full SoC reset.
> > +
> >  config WDT_OCTEONTX
> >  	bool "OcteonTX core watchdog support"
> >  	depends on WDT && (ARCH_OCTEONTX || ARCH_OCTEONTX2)
> > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> > index a35bd559f5..1089cd21f5 100644
> > --- a/drivers/watchdog/Makefile
> > +++ b/drivers/watchdog/Makefile
> > @@ -31,6 +31,7 @@ obj-$(CONFIG_WDT_MPC8xx) +=3D mpc8xx_wdt.o
> >  obj-$(CONFIG_WDT_MT7620) +=3D mt7620_wdt.o
> >  obj-$(CONFIG_WDT_MT7621) +=3D mt7621_wdt.o
> >  obj-$(CONFIG_WDT_MTK) +=3D mtk_wdt.o
> > +obj-$(CONFIG_WDT_NPCM) +=3D npcm_wdt.o
> >  obj-$(CONFIG_WDT_OCTEONTX) +=3D octeontx_wdt.o
> >  obj-$(CONFIG_WDT_OMAP3) +=3D omap_wdt.o
> >  obj-$(CONFIG_WDT_SBSA) +=3D sbsa_gwdt.o
> > diff --git a/drivers/watchdog/npcm_wdt.c b/drivers/watchdog/npcm_wdt.c
> > new file mode 100644
> > index 0000000000..0aedb2fbe7
> > --- /dev/null
> > +++ b/drivers/watchdog/npcm_wdt.c
> > @@ -0,0 +1,117 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2022 Nuvoton Technology, Inc
> > + */
> > +
> > +#include <dm.h>
> > +#include <errno.h>
> > +#include <log.h>
> > +#include <wdt.h>
> > +#include <asm/io.h>
> > +#include <linux/delay.h>
> > +#include <linux/err.h>
> > +
> > +#define NPCM_WTCLK	(BIT(10) | BIT(11))	/* Clock divider */
> > +#define NPCM_WTE	BIT(7)			/* Enable */
> > +#define NPCM_WTIE	BIT(6)			/* Enable irq */
> > +#define NPCM_WTIS	(BIT(4) | BIT(5))	/* Interval selection */
> > +#define NPCM_WTIF	BIT(3)			/* Interrupt flag*/
> > +#define NPCM_WTRF	BIT(2)			/* Reset flag */
> > +#define NPCM_WTRE	BIT(1)			/* Reset enable */
> > +#define NPCM_WTR	BIT(0)			/* Reset counter */
> > +
> > +struct npcm_wdt_priv {
> > +	void __iomem *regs;
> > +};
> > +
> > +static int npcm_wdt_start(struct udevice *dev, u64 timeout_ms, ulong fla=
> gs)
> > +{
> > +	struct npcm_wdt_priv *priv =3D dev_get_priv(dev);
> > +	u32 time_out, val;
> > +
> > +	time_out =3D (u32)(timeout_ms) / 1000;
> > +	if (time_out < 2)
> > +		val =3D 0x800;
> > +	else if (time_out < 3)
> > +		val =3D 0x420;
> > +	else if (time_out < 6)
> > +		val =3D 0x810;
> > +	else if (time_out < 11)
> > +		val =3D 0x430;
> > +	else if (time_out < 22)
> > +		val =3D 0x820;
> > +	else if (time_out < 44)
> > +		val =3D 0xc00;
> > +	else if (time_out < 87)
> > +		val =3D 0x830;
> > +	else if (time_out < 173)
> > +		val =3D 0xc10;
> > +	else if (time_out < 688)
> > +		val =3D 0xc20;
> > +	else
> > +		val =3D 0xc30;
> > +
> > +	val |=3D NPCM_WTRE | NPCM_WTE | NPCM_WTR | NPCM_WTIE;
> > +	writel(val, priv->regs);
> > +
> > +	return 0;
> > +}
> > +
> > +static int npcm_wdt_stop(struct udevice *dev)
> > +{
> > +	struct npcm_wdt_priv *priv =3D dev_get_priv(dev);
> > +
> > +	writel(0, priv->regs);
> > +
> > +	return 0;
> > +}
> > +
> > +static int npcm_wdt_reset(struct udevice *dev)
> > +{
> > +	struct npcm_wdt_priv *priv =3D dev_get_priv(dev);
> > +
> > +	writel(NPCM_WTR | NPCM_WTRE | NPCM_WTE, priv->regs);
> > +
> > +	return 0;
> > +}
> > +
> > +static int npcm_wdt_of_to_plat(struct udevice *dev)
> > +{
> > +	struct npcm_wdt_priv *priv =3D dev_get_priv(dev);
> > +
> > +	priv->regs =3D dev_read_addr_ptr(dev);
> > +	if (!priv->regs)
> > +		return -EINVAL;
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct wdt_ops npcm_wdt_ops =3D {
> > +	.start =3D npcm_wdt_start,
> > +	.reset =3D npcm_wdt_reset,
> > +	.stop =3D npcm_wdt_stop,
> > +};
> > +
> > +static const struct udevice_id npcm_wdt_ids[] =3D {
> > +	{ .compatible =3D "nuvoton,npcm750-wdt" },
> > +	{ .compatible =3D "nuvoton,npcm845-wdt" },
> 
> Do we really need a second compatible string listed here? From this
> driver's perspective both seem to be compatible, are there other
> features (not used by U-Boot) which differ?
> =46rom a quick search I couldn't find a binding or other information
> about this new version of the watchdog, it's not even in the DT posted
> before.

These are the ones described in the (official) bindings. Now with v5,
there is an unsupported/undocumented compatible string. In any case v5 now
deviates from the linux strings, so you cannot reuse the device tree
from linux.

-michael