Promlem with booting on a cora-z7-10
Michal Simek
monstr at monstr.eu
Mon Mar 28 13:17:34 CEST 2022
Hi,
On 3/26/22 11:29, Sarmad Ahmad wrote:
> Hello I try to boot a Cora-Z7-10 with u-boot but without success I followed the instructions from here
> https://u-boot.readthedocs.io/en/latest/board/xilinx/zynq.html
> built u-boot as follows
>
> export ARCH=arm
> export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
> make mrproper
> make xilinx_zynq_virt_defconfig
> make
>
> after that i copied the files to the sd card but nothing happens
> spl/boot.bin -> 121.3 kB
> u-boot.img -> 1.2 MB
>
> The output of u-boot without extension
> arm-linux-gnueabihf-redelf -l u-boot:
>
> Elf-Datei-Typ ist EXEC (ausführbare Datei)
> Entry point 0x4000000
> There are 2 program headers, starting at offset 52
>
> Programm-Header:
> Typ Offset VirtAdr PhysAdr DateiGr SpeiGr Flg Ausr.
> LOAD 0x010000 0x04000000 0x04000000 0xeb0f0 0xeb0f0 RWE 0x10000
> GNU_STACK 0x000000 0x00000000 0x00000000 0x00000 0x00000 RWE 0x10
>
> Abbildung von Sektion nach Segment:
> Segmentsektionen...
> 00 .text .efi_runtime .text_rest .rodata .hash .data .got.plt .u_boot_list .efi_runtime_rel .rel.dyn .bss
> 01
>
> The output of u-boot without extension
> arm-linux-gnueabihf-redelf -h u-boot:
>
> ELF-Header:
> Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00
> Klasse: ELF32
> Daten: 2er-Komplement, Little-Endian
> Version: 1 (aktuell)
> OS/ABI: UNIX - System V
> ABI-Version: 0
> Typ: EXEC (ausführbare Datei)
> Maschine: ARM
> Version: 0x1
> Einstiegspunktadresse: 0x4000000
> Beginn der Programm-Header: 52 (Bytes in Datei)
> Beginn der Sektions-header: 8254932 (Bytes in Datei)
> Flags: 0x5000200, Version5 EABI, soft-float ABI
> Size of this header: 52 (bytes)
> Size of program headers: 32 (bytes)
> Number of program headers: 2
> Size of section headers: 40 (bytes)
> Number of section headers: 27
> Section header string table index: 26
core-z7 is not supported board. That's why you should use fsbl to see something
on the console and then you can use u-boot but you need to generate (via DTG) or
describe your HW design in device tree.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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