[PATCH 3/3] armv8: Initialize MAIR in early boot

[Pierre-Clément Tosi]

As the register is initialized to a constant value, it can be set at any
point before the MMU has been enabled. Instead of waiting until the very
last moment to do so, initialize it during early boot, when we
initialize other system registers. This ensures it is valid at any point
once the C runtime is up.

Signed-off-by: Pierre-Clément Tosi <ptosi at google.com>
Cc: Tom Rini <trini at konsulko.com>
---
 arch/arm/cpu/armv8/Kconfig       |  6 ++++++
 arch/arm/cpu/armv8/start.S       | 12 ++++++++++++
 arch/arm/include/asm/armv8/mmu.h |  5 -----
 3 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 9967376eca..efb451e9a5 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -31,6 +31,12 @@ config ARMV8_SET_SMPEN
 	  it can be safely enabled when EL2/EL3 initialized SMPEN bit
 	  or when CPU implementation doesn't include that register.
 
+config ARMV8_SET_MAIR
+	bool "Initialize the MAIR to its constant value out of boot"
+	default y if !SYS_DISABLE_DCACHE_OPS
+	help
+	  Say Y here to set MAIR_ELx (MEMORY_ATTRIBUTES), needed by the MMU.
+
 config ARMV8_SPIN_TABLE
 	bool "Support spin-table enable method"
 	depends on ARMV8_MULTIENTRY && OF_LIBFDT
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 91b00a46cc..dca58922c1 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -135,6 +135,18 @@ pie_fixup_done:
 	msr	cpacr_el1, x0			/* Enable FP/SIMD */
 0:
 
+#ifdef CONFIG_ARMV8_SET_MAIR
+	ldr	x2, =(MEMORY_ATTRIBUTES)
+	switch_el x1, 3f, 2f, 1f
+	b	0f
+3:	msr	mair_el3, x2
+	b	0f
+2:	msr	mair_el2, x2
+	b	0f
+1:	msr	mair_el1, x2
+0:
+#endif
+
 #ifdef COUNTER_FREQUENCY
 	branch_if_not_highest_el x0, 4f
 	ldr	x0, =COUNTER_FREQUENCY
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 7c17c06e98..c9fbfcaed2 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -109,21 +109,16 @@
 
 static inline void set_ttbr_tcr(int el, u64 table, u64 tcr)
 {
-	const u64 attr = MEMORY_ATTRIBUTES;
-
 	asm volatile("dsb sy");
 	if (el == 1) {
 		asm volatile("msr ttbr0_el1, %0" : : "r" (table) : "memory");
 		asm volatile("msr tcr_el1, %0" : : "r" (tcr) : "memory");
-		asm volatile("msr mair_el1, %0" : : "r" (attr) : "memory");
 	} else if (el == 2) {
 		asm volatile("msr ttbr0_el2, %0" : : "r" (table) : "memory");
 		asm volatile("msr tcr_el2, %0" : : "r" (tcr) : "memory");
-		asm volatile("msr mair_el2, %0" : : "r" (attr) : "memory");
 	} else if (el == 3) {
 		asm volatile("msr ttbr0_el3, %0" : : "r" (table) : "memory");
 		asm volatile("msr tcr_el3, %0" : : "r" (tcr) : "memory");
-		asm volatile("msr mair_el3, %0" : : "r" (attr) : "memory");
 	} else {
 		hang();
 	}
-- 
2.35.1.1021.g381101b075-goog