[PATCH V2 02/14] imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL
Peng Fan (OSS)
peng.fan at oss.nxp.com
Thu May 5 09:43:29 CEST 2022
From: Peng Fan <peng.fan at nxp.com>
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan at nxp.com>
Acked-by: Tim Harvey <tharvey at gateworks.com>
Reviewed-by: Fabio Estevam <festevam at denx.de>
---
board/gateworks/venice/spl.c | 22 ++--------------------
configs/imx8mm_venice_defconfig | 1 -
configs/imx8mn_venice_defconfig | 1 -
configs/imx8mp_venice_defconfig | 1 -
include/configs/imx8mm_venice.h | 3 ---
include/configs/imx8mn_venice.h | 3 ---
include/configs/imx8mp_venice.h | 3 ---
7 files changed, 2 insertions(+), 32 deletions(-)
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 223f22d3463..af196e5b87c 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -87,33 +87,17 @@ static void spl_dram_init(int size)
ddr_init(dram_timing);
}
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
#ifdef CONFIG_IMX8MM
-static iomux_v3_cfg_t const uart_pads[] = {
- IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static iomux_v3_cfg_t const wdog_pads[] = {
IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
#elif CONFIG_IMX8MN
-static const iomux_v3_cfg_t uart_pads[] = {
- IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static const iomux_v3_cfg_t wdog_pads[] = {
IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
#elif CONFIG_IMX8MP
-static const iomux_v3_cfg_t uart_pads[] = {
- MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static const iomux_v3_cfg_t wdog_pads[] = {
MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -128,8 +112,6 @@ int board_early_init_f(void)
set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
return 0;
}
@@ -276,8 +258,6 @@ void board_init_f(ulong dummy)
timer_init();
- preloader_console_init();
-
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
@@ -287,6 +267,8 @@ void board_init_f(ulong dummy)
hang();
}
+ preloader_console_init();
+
enable_tzc380();
/* need to hold PCIe switch in reset otherwise it can lock i2c bus EEPROM is on */
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 490de193181..0165a4e5df0 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -113,7 +113,6 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index 639fee7e5f1..63a65497371 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -112,7 +112,6 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 97c8bb59211..626ac247881 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -112,7 +112,6 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 1b26e0280e1..c3e92b76141 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -101,9 +101,6 @@
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
-/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
index a4826779022..41062b139f8 100644
--- a/include/configs/imx8mn_venice.h
+++ b/include/configs/imx8mn_venice.h
@@ -97,9 +97,6 @@
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
-/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h
index aa0396db8b8..5242b56ad8c 100644
--- a/include/configs/imx8mp_venice.h
+++ b/include/configs/imx8mp_venice.h
@@ -97,9 +97,6 @@
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
-/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
--
2.36.0
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