[PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
Gaurav Jain
gaurav.jain at nxp.com
Wed May 11 10:53:19 CEST 2022
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.
Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <gaurav.jain at nxp.com>
---
drivers/crypto/fsl/fsl_hash.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index a52c4ac957..9e6829b7ad 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -149,12 +149,20 @@ static int caam_hash_finish(void *hash_ctx, void *dest_buf,
driver_hash[caam_algo].digestsize,
1);
+ flush_dcache_range((ulong)ctx->sg_tbl, (ulong)(ctx->sg_tbl) + len);
+ flush_dcache_range((ulong)ctx->sha_desc,
+ (ulong)(ctx->sha_desc) + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE));
+ flush_dcache_range((ulong)ctx->hash,
+ (ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
+
ret = run_descriptor_jr(ctx->sha_desc);
if (ret) {
debug("Error %x\n", ret);
return ret;
} else {
+ invalidate_dcache_range((ulong)ctx->hash,
+ (ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
}
free(ctx);
--
2.25.1
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