[PATCH V2 03/14] imx: imx8mm_mx8menlo: Enable DM_SERIAL

Marcel Ziswiler marcel.ziswiler at toradex.com
Tue May 17 00:24:07 CEST 2022


Hi Peng

On Thu, 2022-05-05 at 15:43 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan at nxp.com>
> 
> Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
> marked with u-boot,dm-spl.

Yes, imx8mm_mx8menlo seems to be using uart2 aka Verdin UART_1 rather than uart1 aka Verdin UART_3 being our
default on all Verdin modules resp. carrier boards.

> Signed-off-by: Peng Fan <peng.fan at nxp.com>
> Reviewed-by: Fabio Estevam <festevam at denx.de>
> ---
>  board/menlo/mx8menlo/mx8menlo.c   | 9 ---------
>  configs/imx8mm-mx8menlo_defconfig | 1 +
>  include/configs/imx8mm-mx8menlo.h | 3 ---
>  3 files changed, 1 insertion(+), 12 deletions(-)
> 
> diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c
> index a4d0becdcc8..95ff95ad360 100644
> --- a/board/menlo/mx8menlo/mx8menlo.c
> +++ b/board/menlo/mx8menlo/mx8menlo.c
> @@ -12,15 +12,8 @@
>  #include <asm/mach-imx/iomux-v3.h>
>  #include <spl.h>
>  
> -#define UART_PAD_CTRL  (PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE4)
>  #define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
>  
> -/* Verdin UART_3, Console/Debug UART */

So this comment was wrong but is now gone for good (;-p).

> -static iomux_v3_cfg_t const uart_pads[] = {
> -       IMX8MM_PAD_SAI3_TXFS_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -       IMX8MM_PAD_SAI3_TXC_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> -};
> -
>  static iomux_v3_cfg_t const wdog_pads[] = {
>         IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
>  };
> @@ -48,8 +41,6 @@ void board_early_init(void)
>  
>         set_wdog_reset(wdog);
>  
> -       imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
> -
>         init_uart_clk(1);
>  
>         setup_snvs();
> diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig
> index 0d3e19e5e31..a4164951de0 100644
> --- a/configs/imx8mm-mx8menlo_defconfig
> +++ b/configs/imx8mm-mx8menlo_defconfig
> @@ -105,6 +105,7 @@ CONFIG_DM_PMIC_PFUZE100=y
>  CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_DM_SERIAL=y
>  CONFIG_MXC_UART=y
>  CONFIG_SYSRESET=y
>  CONFIG_SPL_SYSRESET=y
> diff --git a/include/configs/imx8mm-mx8menlo.h b/include/configs/imx8mm-mx8menlo.h
> index fd1831622f0..530ecd1d460 100644
> --- a/include/configs/imx8mm-mx8menlo.h
> +++ b/include/configs/imx8mm-mx8menlo.h
> @@ -30,7 +30,4 @@
>         "initrd_addr=0x43800000\0"                                      \
>         "kernel_image=fitImage\0"
>  
> -#undef CONFIG_MXC_UART_BASE
> -#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
> -
>  #endif /* __IMX8MM_MX8MENLO_H */

However, I suspect that this may hang early in SPL now as well due to it using our regular SPL code from
board/toradex/verdin-imx8mm/spl.o see [1].

I only very recently this weekend learned that verdin-imx8mm has such hang early in SPL issue due to it missing
to move the preloader_console_init() call similar as to what you did in [2].

Please find patch [3] fixing this which should probably be applied before this series as a hot-fix.

[1] https://source.denx.de/u-boot/u-boot/-/blob/master/board/menlo/mx8menlo/Makefile#L13
[2] https://patchwork.ozlabs.org/project/uboot/patch/20220415043538.27868-3-peng.fan@oss.nxp.com/
[3] https://patchwork.ozlabs.org/project/uboot/patch/20220516222145.959359-1-marcel@ziswiler.com/

Cheers

Marcel


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