[PATCH 2/2] mmc: fsl_esdhc: Add new config option for default fallback mode

Jaehoon Chung jh80.chung at samsung.com
Tue May 17 11:20:44 CEST 2022


On 5/17/22 16:27, Pali Rohár wrote:
> On Tuesday 17 May 2022 08:40:48 Jaehoon Chung wrote:
>> On 5/12/22 03:27, Pali Rohár wrote:
>>> Currently default fallback SDHC mode is 1-bit. Add new config option
>>> CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback
>>> mode. This is useful e.g. for SPL builds which loads other parts from SD
>>> card during boot process.
>>>
>>> Signed-off-by: Pali Rohár <pali at kernel.org>

Reviewed-by: Jaehoon Chung <jh80.chung at samsung.com>

Best Regards,
Jaehoon Chung

>>> ---
>>>  drivers/mmc/Kconfig     | 5 +++++
>>>  drivers/mmc/fsl_esdhc.c | 1 +
>>>  2 files changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
>>> index f04cc44e1973..df15dff6248f 100644
>>> --- a/drivers/mmc/Kconfig
>>> +++ b/drivers/mmc/Kconfig
>>> @@ -826,6 +826,11 @@ config FSL_ESDHC_VS33_NOT_SUPPORT
>>>  	  For eSDHC, power supply is through peripheral circuit. 3.3V support is
>>>  	  common. Select this if 3.3V power supply not supported.
>>>  
>>> +config SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH
>>> +	int
>>> +	depends on FSL_ESDHC
>>> +	default 1
>>
>> Is there any reason not to use dt?
> 
> This is fallback value for function fsl_esdhc_mmc_init() which is called
> when DT is not parsed or used (yet). E.g. this applies for P2020 SPL.
> 
>> Best Regards,
>> Jaehoon Chung
>>
>>> +
>>>  config FSL_ESDHC_IMX
>>>  	bool "Freescale/NXP i.MX eSDHC controller support"
>>>  	help
>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>> index 834f8933b0c6..a4c22942c2be 100644
>>> --- a/drivers/mmc/fsl_esdhc.c
>>> +++ b/drivers/mmc/fsl_esdhc.c
>>> @@ -988,6 +988,7 @@ int fsl_esdhc_mmc_init(struct bd_info *bis)
>>>  
>>>  	cfg = calloc(sizeof(struct fsl_esdhc_cfg), 1);
>>>  	cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
>>> +	cfg->max_bus_width = CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH;
>>>  	/* Prefer peripheral clock which provides higher frequency. */
>>>  	if (gd->arch.sdhc_per_clk)
>>>  		cfg->sdhc_clk = gd->arch.sdhc_per_clk;
>>
> 



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