[PATCH 06/16] arm: stm32mp: add sub config Kconfig.15x
Patrice CHOTARD
patrice.chotard at foss.st.com
Fri May 20 08:39:00 CEST 2022
Hi Patrick
On 5/6/22 16:06, Patrick Delaunay wrote:
> Add sub Kconfig for each SOC in the STM32 CPU family.
>
> It is a preliminary step to introduce a new SOC in the STM32MP family.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
> ---
>
> arch/arm/mach-stm32mp/Kconfig | 119 +---------------------------
> arch/arm/mach-stm32mp/Kconfig.15x | 119 ++++++++++++++++++++++++++++
> configs/stm32mp15_basic_defconfig | 2 +-
> configs/stm32mp15_defconfig | 4 +-
> configs/stm32mp15_trusted_defconfig | 4 +-
> 5 files changed, 125 insertions(+), 123 deletions(-)
> create mode 100644 arch/arm/mach-stm32mp/Kconfig.15x
>
> diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
> index 446d3258c9..3b4936c326 100644
> --- a/arch/arm/mach-stm32mp/Kconfig
> +++ b/arch/arm/mach-stm32mp/Kconfig
> @@ -60,93 +60,6 @@ config STM32MP15x
> dual core A7 for STM32MP157/3, monocore for STM32MP151
> endchoice
>
> -if STM32MP15x
> -
> -config STM32MP15x_STM32IMAGE
> - bool "Support STM32 image for generated U-Boot image"
> - depends on TFABOOT
> - help
> - Support of STM32 image generation for SOC STM32MP15x
> - for TF-A boot when FIP container is not used
> -
> -choice
> - prompt "STM32MP15x board select"
> - optional
> -
> -config TARGET_ST_STM32MP15x
> - bool "STMicroelectronics STM32MP15x boards"
> - imply BOOTSTAGE
> - imply CMD_BOOTSTAGE
> - imply CMD_CLS if CMD_BMP
> - imply DISABLE_CONSOLE
> - imply PRE_CONSOLE_BUFFER
> - imply SILENT_CONSOLE
> - help
> - target the STMicroelectronics board with SOC STM32MP15x
> - managed by board/st/stm32mp1:
> - Evalulation board (EV1) or Discovery board (DK1 and DK2).
> - The difference between board are managed with devicetree
> -
> -config TARGET_MICROGEA_STM32MP1
> - bool "Engicam MicroGEA STM32MP1 SOM"
> - imply BOOTSTAGE
> - imply CMD_BOOTSTAGE
> - imply CMD_CLS if CMD_BMP
> - imply DISABLE_CONSOLE
> - imply PRE_CONSOLE_BUFFER
> - imply SILENT_CONSOLE
> - help
> - MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
> -
> - MicroGEA STM32MP1 MicroDev 2.0:
> - * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
> - LTE and LVDS panel interfaces.
> - * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
> - for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
> -
> - MicroGEA STM32MP1 MicroDev 2.0 7" OF:
> - * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
> - panel and toucscreen.
> - * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
> - pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
> - Open Frame Solution board.
> -
> -config TARGET_ICORE_STM32MP1
> - bool "Engicam i.Core STM32MP1 SOM"
> - imply BOOTSTAGE
> - imply CMD_BOOTSTAGE
> - imply CMD_CLS if CMD_BMP
> - imply DISABLE_CONSOLE
> - imply PRE_CONSOLE_BUFFER
> - imply SILENT_CONSOLE
> - help
> - i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
> -
> - i.Core STM32MP1 EDIMM2.2:
> - * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
> - * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
> - creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
> -
> - i.Core STM32MP1 C.TOUCH 2.0
> - * C.TOUCH 2.0 is a general purpose Carrier board.
> - * i.Core STM32MP1 needs to mount on top of this Carrier board
> - for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
> -
> -config TARGET_DH_STM32MP1_PDK2
> - bool "DH STM32MP1 PDK2"
> - help
> - Target the DH PDK2 development kit with STM32MP15x SoM.
> -
> -endchoice
> -
> -source "board/st/stm32mp1/Kconfig"
> -source "board/dhelectronics/dh_stm32mp1/Kconfig"
> -source "board/engicam/stm32mp1/Kconfig"
> -endif
> -
> -config SYS_TEXT_BASE
> - default 0xC0100000
> -
> config NR_DRAM_BANKS
> default 1
>
> @@ -195,37 +108,7 @@ config CMD_STM32KEY
> This command is used to evaluate the secure boot on stm32mp SOC,
> it is deactivated by default in real products.
>
> -config PRE_CON_BUF_ADDR
> - default 0xC02FF000
> -
> -config PRE_CON_BUF_SZ
> - default 4096
> -
> -config BOOTSTAGE_STASH_ADDR
> - default 0xC3000000
> -
> -if BOOTCOUNT_GENERIC
> -config SYS_BOOTCOUNT_SINGLEWORD
> - default y
> -
> -# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
> -config SYS_BOOTCOUNT_ADDR
> - default 0x5C00A154
> -endif
> -
> -if DEBUG_UART
> -
> -config DEBUG_UART_BOARD_INIT
> - default y
> -
> -# debug on UART4 by default
> -config DEBUG_UART_BASE
> - default 0x40010000
> -
> -# clock source is HSI on reset
> -config DEBUG_UART_CLOCK
> - default 64000000
> -endif
> +source "arch/arm/mach-stm32mp/Kconfig.15x"
>
> source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
> endif
> diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x
> new file mode 100644
> index 0000000000..19f161cf5c
> --- /dev/null
> +++ b/arch/arm/mach-stm32mp/Kconfig.15x
> @@ -0,0 +1,119 @@
> +if STM32MP15x
> +
> +config STM32MP15x_STM32IMAGE
> + bool "Support STM32 image for generated U-Boot image"
> + depends on TFABOOT
> + help
> + Support of STM32 image generation for SOC STM32MP15x
> + for TF-A boot when FIP container is not used
> +
> +choice
> + prompt "STM32MP15x board select"
> + optional
> +
> +config TARGET_ST_STM32MP15x
> + bool "STMicroelectronics STM32MP15x boards"
> + imply BOOTSTAGE
> + imply CMD_BOOTSTAGE
> + imply CMD_CLS if CMD_BMP
> + imply DISABLE_CONSOLE
> + imply PRE_CONSOLE_BUFFER
> + imply SILENT_CONSOLE
> + help
> + target the STMicroelectronics board with SOC STM32MP15x
> + managed by board/st/stm32mp1:
> + Evalulation board (EV1) or Discovery board (DK1 and DK2).
> + The difference between board are managed with devicetree
> +
> +config TARGET_DH_STM32MP1_PDK2
> + bool "DH STM32MP1 PDK2"
> + help
> + Target the DH PDK2 development kit with STM32MP15x SoM.
> +
> +config TARGET_MICROGEA_STM32MP1
> + bool "Engicam MicroGEA STM32MP1 SOM"
> + imply BOOTSTAGE
> + imply CMD_BOOTSTAGE
> + imply CMD_CLS if CMD_BMP
> + imply DISABLE_CONSOLE
> + imply PRE_CONSOLE_BUFFER
> + imply SILENT_CONSOLE
> + help
> + MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
> +
> + MicroGEA STM32MP1 MicroDev 2.0:
> + * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
> + LTE and LVDS panel interfaces.
> + * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
> + for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
> +
> + MicroGEA STM32MP1 MicroDev 2.0 7" OF:
> + * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
> + panel and toucscreen.
> + * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
> + pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
> + Open Frame Solution board.
> +
> +config TARGET_ICORE_STM32MP1
> + bool "Engicam i.Core STM32MP1 SOM"
> + imply BOOTSTAGE
> + imply CMD_BOOTSTAGE
> + imply CMD_CLS if CMD_BMP
> + imply DISABLE_CONSOLE
> + imply PRE_CONSOLE_BUFFER
> + imply SILENT_CONSOLE
> + help
> + i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
> +
> + i.Core STM32MP1 EDIMM2.2:
> + * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
> + * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
> + creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
> +
> + i.Core STM32MP1 C.TOUCH 2.0
> + * C.TOUCH 2.0 is a general purpose Carrier board.
> + * i.Core STM32MP1 needs to mount on top of this Carrier board
> + for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
> +
> +endchoice
> +
> +config SYS_TEXT_BASE
> + default 0xC0100000
> +
> +config PRE_CON_BUF_ADDR
> + default 0xC02FF000
> +
> +config PRE_CON_BUF_SZ
> + default 4096
> +
> +config BOOTSTAGE_STASH_ADDR
> + default 0xC3000000
> +
> +if BOOTCOUNT_GENERIC
> +config SYS_BOOTCOUNT_SINGLEWORD
> + default y
> +
> +# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
> +config SYS_BOOTCOUNT_ADDR
> + default 0x5C00A154
> +endif
> +
> +if DEBUG_UART
> +
> +config DEBUG_UART_BOARD_INIT
> + default y
> +
> +# debug on UART4 by default
> +config DEBUG_UART_BASE
> + default 0x40010000
> +
> +# clock source is HSI on reset
> +config DEBUG_UART_CLOCK
> + default 64000000
> +endif
> +
> +source "board/st/stm32mp1/Kconfig"
> +source "board/dhelectronics/dh_stm32mp1/Kconfig"
> +source "board/engicam/stm32mp1/Kconfig"
> +
> +endif
> diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
> index 46b1cee5e7..998947fe3d 100644
> --- a/configs/stm32mp15_basic_defconfig
> +++ b/configs/stm32mp15_basic_defconfig
> @@ -8,10 +8,10 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
> CONFIG_SPL_TEXT_BASE=0x2FFC2500
> CONFIG_SPL_MMC=y
> CONFIG_SPL=y
> +CONFIG_CMD_STM32KEY=y
> CONFIG_TARGET_ST_STM32MP15x=y
> CONFIG_TYPEC_STUSB160X=y
> CONFIG_ENV_OFFSET_REDUND=0x2C0000
> -CONFIG_CMD_STM32KEY=y
> CONFIG_CMD_STM32PROG=y
> CONFIG_SPL_SPI_FLASH_SUPPORT=y
> CONFIG_SPL_SPI=y
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index 8bb8e4624d..c4f06af732 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
> CONFIG_ENV_OFFSET=0x480000
> CONFIG_ENV_SECT_SIZE=0x40000
> CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
> +CONFIG_DDR_CACHEABLE_SIZE=0x10000000
> +CONFIG_CMD_STM32KEY=y
> CONFIG_TARGET_ST_STM32MP15x=y
> CONFIG_TYPEC_STUSB160X=y
> CONFIG_ENV_OFFSET_REDUND=0x4C0000
> -CONFIG_DDR_CACHEABLE_SIZE=0x10000000
> -CONFIG_CMD_STM32KEY=y
> CONFIG_CMD_STM32PROG=y
> # CONFIG_ARMV7_NONSEC is not set
> CONFIG_SYS_LOAD_ADDR=0xc2000000
> diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
> index 4f73930924..7c2adb3eb0 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -5,12 +5,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
> CONFIG_ENV_OFFSET=0x280000
> CONFIG_ENV_SECT_SIZE=0x40000
> CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
> +CONFIG_DDR_CACHEABLE_SIZE=0x10000000
> +CONFIG_CMD_STM32KEY=y
> CONFIG_STM32MP15x_STM32IMAGE=y
> CONFIG_TARGET_ST_STM32MP15x=y
> CONFIG_TYPEC_STUSB160X=y
> CONFIG_ENV_OFFSET_REDUND=0x2C0000
> -CONFIG_DDR_CACHEABLE_SIZE=0x10000000
> -CONFIG_CMD_STM32KEY=y
> CONFIG_CMD_STM32PROG=y
> # CONFIG_ARMV7_NONSEC is not set
> CONFIG_SYS_LOAD_ADDR=0xc2000000
Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>
Thanks
Patrice
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