[PATCH v1] arm: dts: rockchip: rk3288: rename mmc nodenames

Kever Yang kever.yang at rock-chips.com
Thu May 26 09:03:26 CEST 2022


On 2022/5/2 17:42, Johan Jonker wrote:
> The boot_devices constants for rk3288 were changed to match the
> binding, but the dtsi file was not synced.
> Fix by renaming the rk3288 mmc node names.
> Also correct the clock name for "ciu-drive".
>
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>

Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3288.dtsi | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
> index 5e40e741..0bfa4c39 100644
> --- a/arch/arm/dts/rk3288.dtsi
> +++ b/arch/arm/dts/rk3288.dtsi
> @@ -150,48 +150,48 @@
>   		ports = <&vopl_out>, <&vopb_out>;
>   	};
>   
> -	sdmmc: dwmmc at ff0c0000 {
> +	sdmmc: mmc at ff0c0000 {
>   		compatible = "rockchip,rk3288-dw-mshc";
>   		max-frequency = <150000000>;
>   		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
>   			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
> -		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
> +		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>   		fifo-depth = <0x100>;
>   		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>   		reg = <0xff0c0000 0x4000>;
>   		status = "disabled";
>   	};
>   
> -	sdio0: dwmmc at ff0d0000 {
> +	sdio0: mmc at ff0d0000 {
>   		compatible = "rockchip,rk3288-dw-mshc";
>   		max-frequency = <150000000>;
>   		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
>   			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
> -		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
> +		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>   		fifo-depth = <0x100>;
>   		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
>   		reg = <0xff0d0000 0x4000>;
>   		status = "disabled";
>   	};
>   
> -	sdio1: dwmmc at ff0e0000 {
> +	sdio1: mmc at ff0e0000 {
>   		compatible = "rockchip,rk3288-dw-mshc";
>   		max-frequency = <150000000>;
>   		clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
>   			 <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
> -		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
> +		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>   		fifo-depth = <0x100>;
>   		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
>   		reg = <0xff0e0000 0x4000>;
>   		status = "disabled";
>   	};
>   
> -	emmc: dwmmc at ff0f0000 {
> +	emmc: mmc at ff0f0000 {
>   		compatible = "rockchip,rk3288-dw-mshc";
>   		max-frequency = <150000000>;
>   		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
>   			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
> -		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
> +		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>   		fifo-depth = <0x100>;
>   		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>   		reg = <0xff0f0000 0x4000>;


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