[PULL] u-boot-riscv/master

Leo Liang ycliang at andestech.com
Sat May 28 11:02:09 CEST 2022


On Fri, May 27, 2022 at 09:30:49AM -0400, Tom Rini wrote:
> On Fri, May 27, 2022 at 02:36:29AM +0000, Leo Liang wrote:
> 
> > Hi Tom, 
> > 
> > The following changes since commit 7e0edcadb09d55d5319fdc862041fd1b874476f5:
> > 
> >   Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi (2022-05-24 23:29:00 -0400)
> > 
> > are available in the Git repository at:
> > 
> >   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> > 
> > for you to fetch changes up to c544b281cd3e549a4fcbf4ba9a05a5d72c9557dd:
> > 
> >   riscv: qemu: Set kernel_comp_addr_r for compressed kernel (2022-05-26 18:42:34 +0800)
> > 
> > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/12131
> 
> First, I've applied this to u-boot/master now.  Second, will
> https://patchwork.ozlabs.org/project/uboot/patch/PH7PR14MB5594FD11D1BE74284F554BEBCED49@PH7PR14MB5594.namprd14.prod.outlook.com/
> be coming soon?  Thanks!

Hi Tom, 

This patch you mentioned will not pass CI, and the reason for that 
is the toolchain used for RISC-V in CI does not have corresponding 
settings for zifencei and zicsr.
(detailed disscussion: https://patchwork.ozlabs.org/project/uboot/patch/20220128134713.2322800-1-alexandre.ghiti@canonical.com/)
(CI result: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/440735)

The patch looks valid, but will fail CI on 32-bit configs.
If we use 32-bit toolchain to test 32-bit configs, then 
problems solved.

Do you have any comments?

Best regards.

Leo

 
> -- 
> Tom




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