[PATCH 6/6] sunxi: add CherryPi-F1C200s support

Andre Przywara andre.przywara at arm.com
Tue Oct 18 16:01:15 CEST 2022


On Fri, 14 Oct 2022 01:04:18 -0400
Jesse Taube <mr.bossman075 at gmail.com> wrote:

Hi Jesse, Giulio,

thanks for having a look and for the testing!

> On 10/13/22 05:53, Andre Przywara wrote:
> > On 13/10/2022 09:33, Clément Péron wrote:
> > 
> > Hi Clément,
> >   
> >> On Wed, 12 Oct 2022 at 18:35, Andre Przywara <andre.przywara at arm.com> wrote:  
> >>>
> >>> The CherryPi F1C200s board is a small development board, featuring the
> >>> F1C200s with 64MB of co-packaged DRAM. It comes with two USB-C sockets,
> >>> of which one is connected to a USB-UART chip, that provides easy access
> >>> to UART1.  
> >>
> >> A similar board is trying to been upstreamed by Icenowy:
> >>
> >> see : https://lore.kernel.org/lkml/20221012055602.1544944-11-uwu@icenowy.me/
> >> [PATCH v2 10/10] ARM: dts: suniv: add device tree for PopStick v1.1
> >>
> >> Maybe we should take into account the remarks that Krzysztof Kozlowski
> >> made to follow the same device-tree rules on U-boot.  
> > 
> > Yeah, thanks for the heads up, I saw that. I just wanted to post this to
> > demonstrate what needs to be done. I will be sending a Linux DT patch
> > anyway, since DTs need to go via Linux anyway.
> > 
> > Thanks,
> > Andre
> >   
> >>
> >> Regards,
> >> Clement
> >>  
> >>> Beside the usual micro-SD card slot, the board comes with a SPI NAND
> >>> flash chip, which is not yet supported.
> >>>
> >>> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> >>> ---
> >>>    .../dts/suniv-f1c100s-cherrypi-f1c200s.dts    | 45 +++++++++++++++++++
> >>>    configs/cherrypi_f1c200s_defconfig            | 11 +++++
> >>>    2 files changed, 56 insertions(+)
> >>>    create mode 100644 arch/arm/dts/suniv-f1c100s-cherrypi-f1c200s.dts
> >>>    create mode 100644 configs/cherrypi_f1c200s_defconfig
> >>>
> >>> diff --git a/arch/arm/dts/suniv-f1c100s-cherrypi-f1c200s.dts b/arch/arm/dts/suniv-f1c100s-cherrypi-f1c200s.dts
> >>> new file mode 100644
> >>> index 00000000000..f0ebcb6d893
> >>> --- /dev/null
> >>> +++ b/arch/arm/dts/suniv-f1c100s-cherrypi-f1c200s.dts
> >>> @@ -0,0 +1,45 @@
> >>> +// SPDX-License-Identifier: (GPL-2.0+ OR X11)
> >>> +/*
> >>> + * Copyright 2022 Arm Ltd.
> >>> + * based on another DT, which is:
> >>> + *   Copyright 2018 Icenowy Zheng <icenowy at aosc.io>  
> Her email changed IDK if it is proper to change here.
> >>> + */
> >>> +
> >>> +/dts-v1/;
> >>> +#include "suniv-f1c100s.dtsi"
> >>> +
> >>> +/ {
> >>> +       model = "Cherry Pi F1C200s";
> >>> +       compatible = "lctech,cherrypi-f1c200s", "allwinner,suniv-f1c100s";
> >>> +
> >>> +       aliases {
> >>> +               mmc0 = &mmc0;
> >>> +               serial0 = &uart1;
> >>> +               spi0 = &spi0;  
> no need for spi.
> >>> +       };
> >>> +
> >>> +       chosen {
> >>> +               stdout-path = "serial0:115200n8";
> >>> +       };
> >>> +
> >>> +       reg_vcc3v3: vcc3v3 {
> >>> +               compatible = "regulator-fixed";
> >>> +               regulator-name = "vcc3v3";
> >>> +               regulator-min-microvolt = <3300000>;
> >>> +               regulator-max-microvolt = <3300000>;
> >>> +       };
> >>> +};
> >>> +
> >>> +&mmc0 {
> >>> +       broken-cd;
> >>> +       bus-width = <4>;
> >>> +       disable-wp;
> >>> +       status = "okay";
> >>> +       vmmc-supply = <&reg_vcc3v3>;
> >>> +};
> >>> +
> >>> +&uart1 {
> >>> +       pinctrl-names = "default";
> >>> +       pinctrl-0 = <&uart1_pa_pins>;
> >>> +       status = "okay";
> >>> +};
> >>> diff --git a/configs/cherrypi_f1c200s_defconfig b/configs/cherrypi_f1c200s_defconfig
> >>> new file mode 100644
> >>> index 00000000000..306d363f485
> >>> --- /dev/null
> >>> +++ b/configs/cherrypi_f1c200s_defconfig
> >>> @@ -0,0 +1,11 @@
> >>> +CONFIG_ARM=y
> >>> +CONFIG_SYS_DCACHE_OFF=y
> >>> +CONFIG_ARCH_SUNXI=y
> >>> +CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-cherrypi-f1c200s"
> >>> +CONFIG_SPL=y
> >>> +CONFIG_MACH_SUNIV=y
> >>> +CONFIG_DRAM_CLK=156
> >>> +CONFIG_DRAM_ZQ=0  
> You need
> +CONFIG_SPL_STACK=0x8000

I posted "[PATCH 1/2] sunxi: Kconfig: use SoC-wide values for some symbols"
(https://lore.kernel.org/u-boot/20220913234335.24902-2-andre.przywara@arm.com/)
that solves that issue.
That patch is applied before this series in the tree, so no change should
be needed.

Thanks for the report!

Cheers,
Andre


> 
> I will test this on both 100s and 200s.
> Thanks,
> Jesse Taube
> >>> +CONFIG_SUNXI_MINIMUM_DRAM_MB=64
> >>> +# CONFIG_VIDEO_SUNXI is not set
> >>> +CONFIG_CONS_INDEX=2
> >>> --
> >>> 2.25.1
> >>>
> >>>  
> >   



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