[PATCH v2 1/2] serial: mxc: enable the RX pipeline
Tom Rini
trini at konsulko.com
Tue Sep 6 03:43:33 CEST 2022
On Tue, Sep 06, 2022 at 09:04:05AM +0800, Peng Fan wrote:
>
>
> On 9/5/2022 5:58 PM, Johannes Schneider wrote:
> > on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire
> > (as observable on a connected 'scope) to actually make it into the
> > RXFIFO
> >
> > the reference manual is not overly clear about this, and only
> > mentiones that "UCR3_RXDMUXSEL should always be set." - and since the
> > CR3 register reverts to its reset values after setting the baudrate,
> > setting this bit is done during '_mxc_serial_setbgr'
> >
> > Signed-off-by: Johannes Schneider <johannes.schneider at leica-geosystems.com>
> >
> > ---
> >
> > (no changes since v1)
> >
> > drivers/serial/serial_mxc.c | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
> > index 70a0e5e919..5f283cc635 100644
> > --- a/drivers/serial/serial_mxc.c
> > +++ b/drivers/serial/serial_mxc.c
> > @@ -61,6 +61,11 @@
> > #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */
> > #define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */
> > #define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */
> > +
> > +//imx8 names these bitsfields instead:
> > +#define UCR3_DTRDEN BIT(3) /* bit not used in this chip */
> > +#define UCR3_RXDMUXSEL BIT(2) /* RXD muxed input selected; 'should always be set' */
> > +
> > #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */
> > #define UCR3_BPEN (1<<0) /* Preset registers enable */
> > #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */
> > @@ -176,6 +181,12 @@ static void _mxc_serial_setbrg(struct mxc_uart *base, unsigned long clk,
> > writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
> > &base->cr2);
> > +
> > + // setting the baudrate triggers a reset, returning cr3 to its
> > + // reset value but UCR3_RXDMUXSEL "should always be set."
> > + // according to the imx8 reference-manual
> > + writel(readl(&base->cr3) | UCR3_RXDMUXSEL, &base->cr3);
>
> Please fix comment format.
We allow '//' style comments, just like the linux kernel does these
days. There should be a space before the "imx8" in the first hunk here.
--
Tom
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