[PATCH v2 04/10] usb: dwc3: core: Only handle soft-reset in DCTL

Marek Vasut marex at denx.de
Tue Aug 1 13:44:53 CEST 2023


On 8/1/23 09:28, Eugen Hristev wrote:
> From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> 
> [ Nguyen/Greg: Ported from Linux kernel commit
> 	f4fd84ae0765a ("usb: dwc3: core: Only handle soft-reset in DCTL") ]
> 
> Make sure not to set run_stop bit or link state change request while
> initiating soft-reset. Register read-modify-write operation may
> unintentionally start the controller before the initialization completes
> with its previous DCTL value, which can cause initialization failure.
> 
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> ---
> Not to be merged, I know Marek does not apply any patches to DWC3.

NAK. The statement above is not true, see patch 02/10 .


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