[PATCH v3 07/19] x86: coreboot: Enable CONFIG_SYS_NS16550_MEM32
Simon Glass
sjg at chromium.org
Sat Aug 19 23:22:45 CEST 2023
The debug UART on modern machines uses a 32-bit wide transfer. Without
this, setting debug output causes a hang or no output. It is not obvious
(when enabling CONFIG_DEBUG_UART) that this is needed.
Enable 32-bit access to avoid this trap.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
(no changes since v1)
configs/coreboot64_defconfig | 1 +
configs/coreboot_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig
index a094a7c24234..29b68d6929c7 100644
--- a/configs/coreboot64_defconfig
+++ b/configs/coreboot64_defconfig
@@ -52,6 +52,7 @@ CONFIG_ATAPI=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
index 735cd6eb4c22..2961908f29cd 100644
--- a/configs/coreboot_defconfig
+++ b/configs/coreboot_defconfig
@@ -60,6 +60,7 @@ CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_NVME_PCI=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_CONSOLE_SCROLL_LINES=5
--
2.42.0.rc1.204.g551eb34607-goog
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