[PATCH v3 50/81] x86: Fix up some Kconfig options
Simon Glass
sjg at chromium.org
Mon Feb 6 20:05:18 CET 2023
There are a few inconsistencies in various options on x86. Fix these up
so that conversion to a split config is possible:
- use Proper config in irq, timer and environment
- drop the invalid SPL_ in a CONFIG_IS_ENABLED() usage
- use the correct X86_64 option in msr.h
Signed-off-by: Simon Glass <sjg at chromium.org>
---
(no changes since v1)
arch/x86/cpu/irq.c | 4 ++--
arch/x86/cpu/qemu/qemu.c | 2 +-
arch/x86/include/asm/msr.h | 2 +-
drivers/timer/tsc_timer.c | 2 +-
include/configs/x86-common.h | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index 766b2451a2c..43ffbfeab54 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -217,7 +217,7 @@ static int create_pirq_routing_table(struct udevice *dev)
priv->irq_mask = fdtdec_get_int(blob, node,
"intel,pirq-mask", PIRQ_BITMAP);
- if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
+ if (IS_ENABLED(CONFIG_PPL_GENERATE_ACPI_TABLE)) {
/* Reserve IRQ9 for SCI */
priv->irq_mask &= ~(1 << 9);
}
@@ -347,7 +347,7 @@ int irq_router_probe(struct udevice *dev)
pirq_route_irqs(dev, gd->arch.pirq_routing_table->slots,
get_irq_slot_count(gd->arch.pirq_routing_table));
- if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE))
+ if (IS_ENABLED(CONFIG_PPL_GENERATE_ACPI_TABLE))
irq_enable_sci(dev);
return 0;
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 4f28dc75b70..06ede763a14 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -97,7 +97,7 @@ static void qemu_chipset_init(void)
}
}
-#if !CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
+#if CONFIG_IS_ENABLED(X86_32BIT_INIT)
int arch_cpu_init(void)
{
post_code(POST_CPU_INIT);
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 27764fc56cb..eb3ddde8c07 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -59,7 +59,7 @@ static inline unsigned long long native_read_tscp(unsigned int *aux)
* edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
* it means rax *or* rdx.
*/
-#ifdef CONFIG_X86_64
+#if CONFIG_IS_ENABLED(X86_64)
#define DECLARE_ARGS(val, low, high) unsigned low, high
#define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index 192c7b71a5a..84cb4ee1593 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -376,7 +376,7 @@ void __udelay(unsigned long usec)
stop = now + (u64)usec * get_tbclk_mhz();
while ((int64_t)(stop - get_ticks()) > 0)
-#if defined(CONFIG_QEMU) && defined(CONFIG_SMP)
+#if defined(CONFIG_QEMU) && defined(CONFIG_PPL_SMP)
/*
* Add a 'pause' instruction on qemu target,
* to give other VCPUs a chance to run.
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index c1c5a09a35c..38453e8b74d 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -26,7 +26,7 @@
/* Default environment */
#define CFG_RAMDISK_ADDR 0x4000000
-#if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB)
+#if defined(CONFIG_PPL_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB)
#define CFG_OTHBOOTARGS "othbootargs=\0"
#else
#define CFG_OTHBOOTARGS "othbootargs=acpi=off\0"
--
2.39.1.519.gcb327c4b5f-goog
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