[PATCH v3 49/81] Rename CONFIG_TEXT_BASE
Simon Glass
sjg at chromium.org
Mon Feb 6 20:05:17 CET 2023
This means the text base for U-Boot proper. With split config it will mean
something different in SPL (CONFIG_SPL_TEXT_BASE), so use the PPL prefix
to avoid any problems.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
(no changes since v1)
Makefile | 26 +++++++++----------
arch/arm/cpu/arm1176/start.S | 2 +-
arch/arm/cpu/arm926ejs/mxs/Makefile | 4 +--
arch/arm/cpu/armv7/ls102xa/fdt.c | 2 +-
.../armv8/linux-kernel-image-header-vars.h | 2 +-
arch/arm/cpu/armv8/start.S | 2 +-
arch/arm/include/asm/arch-mxs/sys_proto.h | 2 +-
arch/arm/include/asm/arch-sunxi/boot0.h | 2 +-
arch/arm/lib/crt0.S | 2 +-
arch/arm/lib/relocate_64.S | 2 +-
arch/arm/mach-at91/arm920t/lowlevel_init.S | 4 +--
arch/arm/mach-at91/arm926ejs/lowlevel_init.S | 2 +-
arch/arm/mach-exynos/spl_boot.c | 10 +++----
arch/arm/mach-imx/Makefile | 10 +++----
arch/arm/mach-imx/imx8/cpu.c | 4 +--
arch/arm/mach-imx/spl.c | 2 +-
arch/arm/mach-k3/sysfw-loader.c | 2 +-
arch/arm/mach-nexell/include/mach/boot0.h | 6 ++---
arch/arm/mach-octeontx/cpu.c | 2 +-
arch/arm/mach-octeontx2/cpu.c | 2 +-
arch/arm/mach-sunxi/board.c | 2 +-
arch/arm/mach-sunxi/spl_spi_sunxi.c | 2 +-
arch/m68k/cpu/mcf52x2/start.S | 12 ++++-----
arch/m68k/cpu/mcf530x/start.S | 4 +--
arch/m68k/cpu/mcf5445x/start.S | 16 ++++++------
arch/microblaze/cpu/relocate.c | 6 ++---
arch/microblaze/cpu/start.S | 8 +++---
arch/mips/mach-jz47xx/jz4780/jz4780.c | 4 +--
arch/mips/mach-mscc/lowlevel_init.S | 2 +-
arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 4 +--
arch/x86/cpu/apollolake/spl.c | 2 +-
arch/x86/cpu/quark/quark.c | 2 +-
arch/x86/cpu/start.S | 6 ++---
arch/x86/lib/relocate.c | 6 ++---
arch/x86/lib/spl.c | 6 ++---
board/BuS/eb_cpu5282/eb_cpu5282.c | 2 +-
board/beacon/beacon-rzg2m/beacon-rzg2m.c | 2 +-
board/broadcom/bcmstb/bcmstb.c | 4 +--
board/congatec/cgtqmx8/cgtqmx8.c | 2 +-
board/freescale/ls1021atsn/ls1021atsn.c | 2 +-
board/freescale/ls1021atwr/ls1021atwr.c | 2 +-
board/hoperun/hihope-rzg2/hihope-rzg2.c | 2 +-
board/keymile/common/common.c | 4 +--
board/nokia/rx51/lowlevel_init.S | 6 ++---
board/qualcomm/dragonboard820c/head.S | 2 +-
board/renesas/falcon/falcon.c | 2 +-
board/silinux/ek874/ek874.c | 2 +-
board/socrates/socrates.c | 2 +-
board/ti/ks2_evm/board.c | 2 +-
cmd/sf.c | 2 +-
common/autoboot.c | 8 +++---
common/board_f.c | 10 +++----
common/board_r.c | 2 +-
common/spl/spl.c | 8 +++---
common/spl/spl_atf.c | 2 +-
common/spl/spl_nand.c | 6 ++---
common/spl/spl_optee.S | 2 +-
include/configs/MCR3000.h | 2 +-
include/configs/MPC837XERDB.h | 10 +++----
include/configs/MPC8548CDS.h | 10 +++----
include/configs/P2041RDB.h | 8 +++---
include/configs/T102xRDB.h | 4 +--
include/configs/T104xRDB.h | 2 +-
include/configs/T208xQDS.h | 4 +--
include/configs/T208xRDB.h | 4 +--
include/configs/T4240RDB.h | 2 +-
include/configs/am3517_evm.h | 2 +-
include/configs/at91sam9260ek.h | 2 +-
include/configs/baltos.h | 2 +-
include/configs/bcmstb.h | 2 +-
include/configs/corvus.h | 6 ++---
include/configs/devkit3250.h | 6 ++---
include/configs/evb_ast2500.h | 2 +-
include/configs/evb_ast2600.h | 2 +-
.../configs/gardena-smart-gateway-at91sam.h | 4 +--
.../configs/gardena-smart-gateway-mt7688.h | 2 +-
include/configs/hikey.h | 2 +-
include/configs/hikey960.h | 2 +-
include/configs/imx6-engicam.h | 2 +-
include/configs/imx6_logic.h | 2 +-
include/configs/kontron-sl-mx6ul.h | 2 +-
include/configs/linkit-smart-7688.h | 2 +-
include/configs/ls1021aqds.h | 4 +--
include/configs/ls1043a_common.h | 6 ++---
include/configs/ls1046a_common.h | 4 +--
include/configs/ls1046aqds.h | 2 +-
include/configs/ls1088a_common.h | 2 +-
include/configs/ls2080a_common.h | 2 +-
include/configs/meesc.h | 2 +-
include/configs/microblaze-generic.h | 2 +-
include/configs/mt7620.h | 2 +-
include/configs/mt7622.h | 4 +--
include/configs/mt7628.h | 2 +-
include/configs/mt7981.h | 4 +--
include/configs/mt7986.h | 4 +--
include/configs/mt8512.h | 2 +-
include/configs/mv-common.h | 2 +-
include/configs/octeontx2_common.h | 2 +-
include/configs/octeontx_common.h | 2 +-
include/configs/p1_p2_rdb_pc.h | 18 ++++++-------
include/configs/rpi.h | 2 +-
include/configs/siemens-am33x-common.h | 2 +-
include/configs/smartweb.h | 6 ++---
include/configs/taurus.h | 6 ++---
include/configs/ti_armv7_common.h | 2 +-
include/configs/vocore2.h | 2 +-
include/configs/work_92105.h | 6 ++---
include/spl.h | 4 +--
lib/efi/efi_stub.c | 10 +++----
lib/efi_loader/efi_runtime.c | 8 +++---
lib/trace.c | 4 +--
111 files changed, 227 insertions(+), 227 deletions(-)
diff --git a/Makefile b/Makefile
index 11fdc927531..09a5b6f6424 100644
--- a/Makefile
+++ b/Makefile
@@ -1030,7 +1030,7 @@ LDFLAGS_u-boot += -z notext $(call ld-option,--apply-dynamic-relocs)
LDFLAGS_u-boot += --build-id=none
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
-LDFLAGS_u-boot += -Ttext $(CONFIG_TEXT_BASE)
+LDFLAGS_u-boot += -Ttext $(CONFIG_PPL_TEXT_BASE)
endif
# insure the checker run with the right endianness
@@ -1302,7 +1302,7 @@ shell_cmd = { $(call echo-cmd,$(1)) $(cmd_$(1)); }
quiet_cmd_objcopy_uboot = OBJCOPY $@
ifdef cmd_static_rela
-cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_TEXT_BASE)) || { rm -f $@; false; }
+cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_PPL_TEXT_BASE)) || { rm -f $@; false; }
else
cmd_objcopy_uboot = $(cmd_objcopy)
endif
@@ -1356,7 +1356,7 @@ u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE
# from the SPL U-Boot version.
#
ifndef CFG_SYS_UBOOT_START
-CFG_SYS_UBOOT_START := $(CONFIG_TEXT_BASE)
+CFG_SYS_UBOOT_START := $(CONFIG_PPL_TEXT_BASE)
endif
# Boards with more complex image requirements can provide an .its source file
@@ -1378,7 +1378,7 @@ endif
ifdef CONFIG_SPL_LOAD_FIT
MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
- -a $(CONFIG_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
+ -a $(CONFIG_PPL_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
-p $(CONFIG_FIT_EXTERNAL_OFFSET) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \
@@ -1386,10 +1386,10 @@ MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST)))
else
MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
- -a $(CONFIG_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
+ -a $(CONFIG_PPL_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
MKIMAGEFLAGS_u-boot-ivt.img = -A $(ARCH) -T firmware_ivt -C none -O u-boot \
- -a $(CONFIG_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
+ -a $(CONFIG_PPL_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot-ivt.img: MKIMAGEOUTPUT = u-boot-ivt.img.log
endif
@@ -1408,10 +1408,10 @@ KWD_CONFIG_FILE = $(shell \
fi)
MKIMAGEFLAGS_u-boot.kwb = -n $(KWD_CONFIG_FILE) \
- -T kwbimage -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE)
+ -T kwbimage -a $(CONFIG_PPL_TEXT_BASE) -e $(CONFIG_PPL_TEXT_BASE)
MKIMAGEFLAGS_u-boot-with-spl.kwb = -n $(KWD_CONFIG_FILE) \
- -T kwbimage -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) \
+ -T kwbimage -a $(CONFIG_PPL_TEXT_BASE) -e $(CONFIG_PPL_TEXT_BASE) \
$(if $(KEYDIR),-k $(KEYDIR))
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
@@ -1420,7 +1420,7 @@ MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
UBOOT_BIN := u-boot.bin
MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \
- -a $(CONFIG_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
+ -a $(CONFIG_PPL_TEXT_BASE) -e $(CFG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot.bin.lzma: u-boot.bin FORCE
@@ -1525,7 +1525,7 @@ u-boot.uim: u-boot.bin FORCE
u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL $(if $(CONFIG_OF_SEPARATE),u-boot.img,u-boot.uim) FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
-MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_TEXT_BASE)
+MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_PPL_TEXT_BASE)
u-boot.ubl: u-boot-with-spl.bin FORCE
$(call if_changed,mkimage)
@@ -1657,8 +1657,8 @@ u-boot-with-spl-pbl.bin: spl/u-boot-spl.pbl $(UBOOT_BINLOAD) FORCE
quiet_cmd_u-boot-elf ?= LD $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
$(if $(CONFIG_SYS_BIG_ENDIAN),-EB,-EL) \
- -T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_TEXT_BASE) \
- -Ttext=$(CONFIG_TEXT_BASE)
+ -T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_PPL_TEXT_BASE) \
+ -Ttext=$(CONFIG_PPL_TEXT_BASE)
u-boot.elf: u-boot.bin u-boot-elf.lds
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
@@ -1679,7 +1679,7 @@ u-boot-mtk.bin: u-boot-with-spl.bin
$(call if_changed,copy)
else
MKIMAGEFLAGS_u-boot-mtk.bin = -T mtk_image \
- -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) \
+ -a $(CONFIG_PPL_TEXT_BASE) -e $(CONFIG_PPL_TEXT_BASE) \
-n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
u-boot-mtk.bin: u-boot.bin FORCE
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 78a9cc173a3..4f275be05b8 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -84,7 +84,7 @@ cpu_init_crit:
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
- sub r2, r2, #(CFG_SYS_UBOOT_BASE - CONFIG_TEXT_BASE)
+ sub r2, r2, #(CFG_SYS_UBOOT_BASE - CONFIG_PPL_TEXT_BASE)
b mmu_disable
.align 5
diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
index 1638ef8fd8d..8ac7439c18d 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -60,14 +60,14 @@ spl/u-boot-spl.ivt: spl/u-boot-spl.bin
u-boot.ivt: u-boot.bin
$(call if_changed,mkalign_mxs)
- $(call if_changed,mkivt_mxs,$(CONFIG_TEXT_BASE),\
+ $(call if_changed,mkivt_mxs,$(CONFIG_PPL_TEXT_BASE),\
0x40001000,0x40001040)
spl/u-boot-spl.csf: spl/u-boot-spl.ivt spl/u-boot-spl.bin board/$(VENDOR)/$(BOARD)/sign/u-boot-spl.csf
$(call if_changed,mkcsfreq_mxs,$(CONFIG_SPL_TEXT_BASE),0x8000)
u-boot.csf: u-boot.ivt u-boot.bin board/$(VENDOR)/$(BOARD)/sign/u-boot.csf
- $(call if_changed,mkcsfreq_mxs,$(CONFIG_TEXT_BASE),0x40001000)
+ $(call if_changed,mkcsfreq_mxs,$(CONFIG_PPL_TEXT_BASE),0x40001000)
%.sig: %.csf
$(call if_changed,mkcst_mxs)
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index 599b7e18ef3..1871acdce44 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -146,7 +146,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
* Since second uboot binary has a head, that space need to be
* reserved either(assuming its size is less than 0x1000).
*/
- off = fdt_add_mem_rsv(blob, CONFIG_TEXT_BASE - UBOOT_HEAD_LEN,
+ off = fdt_add_mem_rsv(blob, CONFIG_PPL_TEXT_BASE - UBOOT_HEAD_LEN,
CONFIG_SYS_MONITOR_LEN +
CONFIG_SYS_SPL_MALLOC_SIZE + UBOOT_HEAD_LEN);
if (off < 0)
diff --git a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h
index b6394aee165..92dcde5cc36 100644
--- a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h
+++ b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h
@@ -69,7 +69,7 @@
(__HEAD_FLAG_PAGE_SIZE << 1) | \
(__HEAD_FLAG_PHYS_BASE << 3))
-#define TEXT_OFFSET (CONFIG_TEXT_BASE - \
+#define TEXT_OFFSET (CONFIG_PPL_TEXT_BASE - \
CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE)
/*
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index f3ea8585770..94cbf96a6e5 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -35,7 +35,7 @@ _start:
.globl _TEXT_BASE
_TEXT_BASE:
- .quad CONFIG_TEXT_BASE
+ .quad CONFIG_PPL_TEXT_BASE
/*
* These are defined in the linker script.
diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
index 17afd1b29e4..5af8e3732a7 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -85,7 +85,7 @@ static const struct mxs_pair mxs_boot_modes[] = {
#define MXS_BM_SDMMC1_3V3 0x0a
#define MXS_BM_SDMMC1_1V8 0x1a
-#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_TEXT_BASE - 0x200))
+#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_PPL_TEXT_BASE - 0x200))
struct mxs_spl_data {
uint8_t boot_mode_idx;
diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h
index 46b7e073b59..ec2ae77184b 100644
--- a/arch/arm/include/asm/arch-sunxi/boot0.h
+++ b/arch/arm/include/asm/arch-sunxi/boot0.h
@@ -47,7 +47,7 @@
#ifdef CONFIG_SPL_BUILD
.word CONFIG_SPL_TEXT_BASE
#else
- .word CONFIG_TEXT_BASE
+ .word CONFIG_PPL_TEXT_BASE
#endif
.word fel_stash - .
#else
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index a0311438b45..85435b66d07 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -144,7 +144,7 @@ ENTRY(_main)
adr r0, _main
ldr r1, _start_ofs
add r0, r1
- ldr r1, =CONFIG_TEXT_BASE
+ ldr r1, =CONFIG_PPL_TEXT_BASE
sub r1, r0
add lr, r1
#if defined(CONFIG_SYS_RELOC_GD_ENV_ADDR)
diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index 495a5f03ba7..11f3265171c 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -37,7 +37,7 @@ ENTRY(relocate_code)
* correctly apply relocations, we need to know the linked value.
*
* Linked &__image_copy_start, which we know was at
- * CONFIG_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
+ * CONFIG_PPL_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
* relocated value, since it isn't a symbol reference.
*/
ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */
diff --git a/arch/arm/mach-at91/arm920t/lowlevel_init.S b/arch/arm/mach-at91/arm920t/lowlevel_init.S
index 6b7d3cbc710..ee977be0304 100644
--- a/arch/arm/mach-at91/arm920t/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm920t/lowlevel_init.S
@@ -22,9 +22,9 @@
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
- .word CONFIG_TEXT_BASE-PHYS_FLASH_1
+ .word CONFIG_PPL_TEXT_BASE-PHYS_FLASH_1
#else
- .word CONFIG_TEXT_BASE
+ .word CONFIG_PPL_TEXT_BASE
#endif
.globl lowlevel_init
diff --git a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
index e159a74eeac..5bd30757fd9 100644
--- a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
@@ -32,7 +32,7 @@ lowlevel_init:
POS1:
adr r5, POS1 /* r5 = POS1 run time */
ldr r0, =POS1 /* r0 = POS1 compile */
- sub r5, r5, r0 /* r0 = CONFIG_TEXT_BASE-1 */
+ sub r5, r5, r0 /* r0 = CONFIG_PPL_TEXT_BASE-1 */
/* memory control configuration 1 */
ldr r0, =SMRDATA
diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c
index 553dac75b61..f959994d9a9 100644
--- a/arch/arm/mach-exynos/spl_boot.c
+++ b/arch/arm/mach-exynos/spl_boot.c
@@ -251,7 +251,7 @@ void copy_uboot_to_ram(void)
#ifdef CONFIG_SPI_BOOTING
case BOOT_MODE_SERIAL:
/* Customised function to copy u-boot from SF */
- exynos_spi_copy(param->uboot_size, CONFIG_TEXT_BASE);
+ exynos_spi_copy(param->uboot_size, CONFIG_PPL_TEXT_BASE);
break;
#endif
case BOOT_MODE_SD:
@@ -267,7 +267,7 @@ void copy_uboot_to_ram(void)
copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX);
end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX);
- copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_TEXT_BASE);
+ copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_PPL_TEXT_BASE);
end_bootop_from_emmc();
break;
#endif
@@ -279,7 +279,7 @@ void copy_uboot_to_ram(void)
*/
is_cr_z_set = config_branch_prediction(0);
usb_copy = get_irom_func(USB_INDEX);
- usb_copy(0, (u32 *)CONFIG_TEXT_BASE);
+ usb_copy(0, (u32 *)CONFIG_PPL_TEXT_BASE);
config_branch_prediction(is_cr_z_set);
break;
#endif
@@ -288,7 +288,7 @@ void copy_uboot_to_ram(void)
}
if (copy_bl2)
- copy_bl2(offset, size, CONFIG_TEXT_BASE);
+ copy_bl2(offset, size, CONFIG_PPL_TEXT_BASE);
}
void memzero(void *s, size_t n)
@@ -329,7 +329,7 @@ void board_init_f(unsigned long bootflag)
copy_uboot_to_ram();
/* Jump to U-Boot image */
- uboot = (void *)CONFIG_TEXT_BASE;
+ uboot = (void *)CONFIG_PPL_TEXT_BASE;
(*uboot)();
/* Never returns Here */
}
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 61b4f4f8cd3..8f9a049cd8a 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -126,7 +126,7 @@ DEPFILE_EXISTS := 0
endif
MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
- -T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
+ -T $(IMAGE_TYPE) -e $(CONFIG_PPL_TEXT_BASE)
u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log
u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
@@ -134,7 +134,7 @@ u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
ifeq ($(CONFIG_MULTI_DTB_FIT),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
- -T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
+ -T $(IMAGE_TYPE) -e $(CONFIG_PPL_TEXT_BASE)
u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
u-boot-dtb.imx: u-boot-fit-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
@@ -143,7 +143,7 @@ ifeq ($(DEPFILE_EXISTS),0)
endif
else ifeq ($(CONFIG_OF_SEPARATE),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
- -T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
+ -T $(IMAGE_TYPE) -e $(CONFIG_PPL_TEXT_BASE)
u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
@@ -207,8 +207,8 @@ SPL: MKIMAGEOUTPUT = SPL.log
SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
-MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_TEXT_BASE) \
- -e $(CONFIG_TEXT_BASE) -C none -T firmware
+MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_PPL_TEXT_BASE) \
+ -e $(CONFIG_PPL_TEXT_BASE) -C none -T firmware
u-boot.uim: u-boot.bin FORCE
$(call if_changed,mkimage)
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index be1f4edded1..318bfc590b7 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -313,8 +313,8 @@ phys_size_t get_effective_memsize(void)
/* Find the memory region runs the U-Boot */
if (start >= phys_sdram_1_start && start <= end1 &&
- (start <= CONFIG_TEXT_BASE &&
- end >= CONFIG_TEXT_BASE)) {
+ (start <= CONFIG_PPL_TEXT_BASE &&
+ end >= CONFIG_PPL_TEXT_BASE)) {
if ((end + 1) <=
((sc_faddr_t)phys_sdram_1_start +
phys_sdram_1_size))
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index cb9801b7a13..45c84245551 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -341,7 +341,7 @@ void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
if (bl_len < 512)
bl_len = 512;
- return (void *)((CONFIG_TEXT_BASE - fit_size - bl_len -
+ return (void *)((CONFIG_PPL_TEXT_BASE - fit_size - bl_len -
align_len) & ~align_len);
}
#endif
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index c4c5c371100..cd50a2ae9f0 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/sysfw-loader.c
@@ -91,7 +91,7 @@ static void *sysfw_load_address;
struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
if (sysfw_loaded)
- return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE + offset);
+ return (struct legacy_img_hdr *)(CONFIG_PPL_TEXT_BASE + offset);
else if (sysfw_load_address)
return sysfw_load_address;
else
diff --git a/arch/arm/mach-nexell/include/mach/boot0.h b/arch/arm/mach-nexell/include/mach/boot0.h
index 29f37d3ba4c..936f007bdc3 100644
--- a/arch/arm/mach-nexell/include/mach/boot0.h
+++ b/arch/arm/mach-nexell/include/mach/boot0.h
@@ -5,7 +5,7 @@
* The NSIH (first 512 Bytes of u-boot.bin) is necessary for the
* 2nd-Bootloader to get information like load address of U-Boot.
*
- * 0x400 must be added to CONFIG_TEXT_BASE to have the actual load and
+ * 0x400 must be added to CONFIG_PPL_TEXT_BASE to have the actual load and
* start address because 2nd-Bootloader loads with an offset of 0x400
* (NSIH + 0x200 bytes are not loaded into RAM).
*
@@ -23,9 +23,9 @@
.word (_end - _start) + 20 * 1024 /* 0x50: load size
* (bin + 20k for DTB) */
.space 0x4
- .word CONFIG_TEXT_BASE + 0x400 /* 0x58: load address */
+ .word CONFIG_PPL_TEXT_BASE + 0x400 /* 0x58: load address */
.word 0x00000000
- .word CONFIG_TEXT_BASE + 0x400 /* 0x60: start address */
+ .word CONFIG_PPL_TEXT_BASE + 0x400 /* 0x60: start address */
.space 0x198
.byte 'N' /* 0x1FC: "NSIH" signature */
.byte 'S'
diff --git a/arch/arm/mach-octeontx/cpu.c b/arch/arm/mach-octeontx/cpu.c
index aa5f4585c6f..4df46907981 100644
--- a/arch/arm/mach-octeontx/cpu.c
+++ b/arch/arm/mach-octeontx/cpu.c
@@ -46,7 +46,7 @@ struct mm_region *mem_map = otx_mem_map;
void mem_map_fill(void)
{
int banks = OTX_MEM_MAP_USED;
- u32 dram_start = CONFIG_TEXT_BASE;
+ u32 dram_start = CONFIG_PPL_TEXT_BASE;
if (otx_is_soc(CN83XX)) {
otx_mem_map[banks].virt = 0x8c0000000000UL;
diff --git a/arch/arm/mach-octeontx2/cpu.c b/arch/arm/mach-octeontx2/cpu.c
index 723deef719b..46acb94a3c0 100644
--- a/arch/arm/mach-octeontx2/cpu.c
+++ b/arch/arm/mach-octeontx2/cpu.c
@@ -51,7 +51,7 @@ struct mm_region *mem_map = otx2_mem_map;
void mem_map_fill(void)
{
int banks = OTX2_MEM_MAP_USED;
- u32 dram_start = CONFIG_TEXT_BASE;
+ u32 dram_start = CONFIG_PPL_TEXT_BASE;
for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
otx2_mem_map[banks].virt = dram_start;
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 391a65a5495..1f31aac607c 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -362,7 +362,7 @@ __weak void sunxi_sram_init(void)
static bool sunxi_valid_emmc_boot(struct mmc *mmc)
{
struct blk_desc *bd = mmc_get_blk_desc(mmc);
- u32 *buffer = (void *)(uintptr_t)CONFIG_TEXT_BASE;
+ u32 *buffer = (void *)(uintptr_t)CONFIG_PPL_TEXT_BASE;
struct boot_file_head *egon_head = (void *)buffer;
struct toc0_main_info *toc0_info = (void *)buffer;
int bootpart = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index 81159cfee61..f31cfe748a9 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -341,7 +341,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
struct legacy_img_hdr *header;
uint32_t load_offset = sunxi_get_spl_size();
- header = (struct legacy_img_hdr *)CONFIG_TEXT_BASE;
+ header = (struct legacy_img_hdr *)CONFIG_PPL_TEXT_BASE;
load_offset = max_t(uint32_t, load_offset, CONFIG_SYS_SPI_U_BOOT_OFFS);
spi0_init();
diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S
index d48d0192eea..c35341c37cc 100644
--- a/arch/m68k/cpu/mcf52x2/start.S
+++ b/arch/m68k/cpu/mcf52x2/start.S
@@ -35,8 +35,8 @@
*/
_vectors:
.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
-#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
-.long _start - CONFIG_TEXT_BASE
+#if defined(CONFIG_M5282) && (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
+.long _start - CONFIG_PPL_TEXT_BASE
#else
.long _START
#endif
@@ -83,7 +83,7 @@ _vectors:
#if defined(CFG_SYS_INT_FLASH_BASE) && \
(defined(CONFIG_M5282) || defined(CONFIG_M5281))
-#if (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
+#if (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
.long 0xFFFFFFFF /* all sectors protected */
.long 0x00000000 /* supervisor/User restriction */
@@ -130,7 +130,7 @@ _start:
movec %d0, %RAMBAR1
#if defined(CONFIG_M5282)
-#if (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
+#if (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
/*
* Setup code in SRAM to initialize FLASHBAR,
* if start from internal Flash
@@ -156,7 +156,7 @@ _after_flashbar_copy:
/* Setup code to initialize FLASHBAR, if start from external Memory */
move.l #(CFG_SYS_INT_FLASH_BASE + CFG_SYS_INT_FLASH_ENABLE), %d0
movec %d0, %FLASHBAR
-#endif /* (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE) */
+#endif /* (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE) */
#endif
#endif
@@ -165,7 +165,7 @@ _after_flashbar_copy:
* therefore no VBR to set
*/
#if !defined(CONFIG_MONITOR_IS_IN_RAM)
-#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
+#if defined(CONFIG_M5282) && (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
move.l #CFG_SYS_INT_FLASH_BASE, %d0
#else
move.l #CFG_SYS_FLASH_BASE, %d0
diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S
index dbe2b54e410..ef67941940a 100644
--- a/arch/m68k/cpu/mcf530x/start.S
+++ b/arch/m68k/cpu/mcf530x/start.S
@@ -39,8 +39,8 @@ _vectors:
/* Flash offset is 0 until we setup CS0 */
.long 0x00000000
#if defined(CONFIG_M5307) && \
- (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
-.long _start - CONFIG_TEXT_BASE
+ (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
+.long _start - CONFIG_PPL_TEXT_BASE
#else
.long _START
#endif
diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index a083c3d45d2..3c5d01db938 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -26,10 +26,10 @@
rte;
#if defined(CONFIG_SERIAL_BOOT)
-#define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
+#define ASM_DRAMINIT (asm_dram_init - CONFIG_PPL_TEXT_BASE + \
CFG_SYS_INIT_RAM_ADDR)
-#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
-#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_TEXT_BASE + \
+#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_PPL_TEXT_BASE)
+#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_PPL_TEXT_BASE + \
CFG_SYS_INIT_RAM_ADDR)
#endif
@@ -116,7 +116,7 @@ vector192_255:
asm_sbf_img_hdr:
.long 0x00000000 /* checksum, not yet implemented */
.long 0x00040000 /* image length */
- .long CONFIG_TEXT_BASE /* image to be relocated at */
+ .long CONFIG_PPL_TEXT_BASE /* image to be relocated at */
asm_dram_init:
move.w #0x2700,%sr /* Mask off Interrupt */
@@ -271,7 +271,7 @@ asm_dspi_rd_loop2:
jsr asm_dspi_rd_status
/* jump to memory and execute */
- move.l #(CONFIG_TEXT_BASE + 0x400), %a0
+ move.l #(CONFIG_PPL_TEXT_BASE + 0x400), %a0
jmp (%a0)
asm_dspi_wr_status:
@@ -298,7 +298,7 @@ asm_dspi_rd_status:
/* copy 4 boot pages to dram as soon as possible */
/* each page is 996 bytes (1056 total with 60 ECC bytes */
move.l #0x00000000, %a1 /* src */
- move.l #CONFIG_TEXT_BASE, %a2 /* dst */
+ move.l #CONFIG_PPL_TEXT_BASE, %a2 /* dst */
move.l #0x3E0, %d0 /* sz in long */
asm_boot_nand_copy:
@@ -381,7 +381,7 @@ asm_nand_init:
move.l #4, %d2 /* start at 4 */
move.l #0xFC0FFF04, %a0 /* cmd2 */
move.l #0xFC0FFF0C, %a1 /* rar */
- move.l #(CONFIG_TEXT_BASE + 0xF80), %a2
+ move.l #(CONFIG_PPL_TEXT_BASE + 0xF80), %a2
asm_nand_read:
move.l #0x11000000, %d0 /* rar */
@@ -419,7 +419,7 @@ asm_nand_copy:
bgt asm_nand_read
/* jump to memory and execute */
- move.l #(CONFIG_TEXT_BASE + 0x400), %a0
+ move.l #(CONFIG_PPL_TEXT_BASE + 0x400), %a0
jmp (%a0)
#endif /* CONFIG_SYS_NAND_BOOT */
diff --git a/arch/microblaze/cpu/relocate.c b/arch/microblaze/cpu/relocate.c
index 7a15fb2ec39..e2198762272 100644
--- a/arch/microblaze/cpu/relocate.c
+++ b/arch/microblaze/cpu/relocate.c
@@ -19,7 +19,7 @@
* @rela_start: rela section start
* @rela_end: rela section end
* @dyn_start: dynamic section start
- * @origin_addr: address where u-boot starts(doesn't need to be CONFIG_TEXT_BASE)
+ * @origin_addr: address where u-boot starts(doesn't need to be CONFIG_PPL_TEXT_BASE)
*/
void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start,
u32 rela_end, u32 dyn_start, u32 origin_addr)
@@ -29,9 +29,9 @@ void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start,
/*
* Return in case u-boot.elf is used directly.
* Skip it when u-boot.bin is loaded to different address than
- * CONFIG_TEXT_BASE. In this case relocation is necessary to run.
+ * CONFIG_PPL_TEXT_BASE. In this case relocation is necessary to run.
*/
- if (reloc_addr == CONFIG_TEXT_BASE) {
+ if (reloc_addr == CONFIG_PPL_TEXT_BASE) {
debug_cond(verbose,
"Relocation address is the same - skip relocation\n");
return;
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 7079d9e1704..a620e0b207c 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -55,15 +55,15 @@ uboot_sym_start:
add r6, r0, r0
lwi r7, r20, ALIGNMENT_ADDR
- addi r7, r7, -CONFIG_TEXT_BASE
+ addi r7, r7, -CONFIG_PPL_TEXT_BASE
add r7, r7, r5
lwi r8, r20, ALIGNMENT_ADDR + 0x4
- addi r8, r8, -CONFIG_TEXT_BASE
+ addi r8, r8, -CONFIG_PPL_TEXT_BASE
add r8, r8, r5
lwi r9, r20, ALIGNMENT_ADDR + 0x8
- addi r9, r9, -CONFIG_TEXT_BASE
+ addi r9, r9, -CONFIG_PPL_TEXT_BASE
add r9, r9, r5
- addi r10, r0, CONFIG_TEXT_BASE
+ addi r10, r0, CONFIG_PPL_TEXT_BASE
brlid r15, mb_fix_rela
nop
diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c
index 15d1eff2ba7..71f3eecacf1 100644
--- a/arch/mips/mach-jz47xx/jz4780/jz4780.c
+++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c
@@ -58,7 +58,7 @@ void board_init_f(ulong dummy)
if (ret)
hang();
- header = (struct legacy_img_hdr *)(CONFIG_TEXT_BASE -
+ header = (struct legacy_img_hdr *)(CONFIG_PPL_TEXT_BASE -
sizeof(struct legacy_img_hdr));
count = blk_dread(mmc_get_blk_desc(mmc),
@@ -68,7 +68,7 @@ void board_init_f(ulong dummy)
hang();
image_entry_noargs_t image_entry =
- (image_entry_noargs_t)CONFIG_TEXT_BASE;
+ (image_entry_noargs_t)CONFIG_PPL_TEXT_BASE;
image_entry();
diff --git a/arch/mips/mach-mscc/lowlevel_init.S b/arch/mips/mach-mscc/lowlevel_init.S
index 0c24cb5f22d..9d98d01090e 100644
--- a/arch/mips/mach-mscc/lowlevel_init.S
+++ b/arch/mips/mach-mscc/lowlevel_init.S
@@ -21,7 +21,7 @@ LEAF(lowlevel_init)
/* Modify ra/s0 such we return to physical NOR location */
li t0, 0x0fffffff
- li t1, CONFIG_TEXT_BASE
+ li t1, CONFIG_PPL_TEXT_BASE
and s0, ra, t0
add s0, s0, t1
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index a67f37e3af9..66f5106659f 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -30,7 +30,7 @@ void setup_ifc(void)
_mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(15);
_mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_IPROT |
MAS1_TSIZE(BOOKE_PAGESZ_4M);
- _mas2 = FSL_BOOKE_MAS2(CONFIG_TEXT_BASE, MAS2_I | MAS2_G);
+ _mas2 = FSL_BOOKE_MAS2(CONFIG_PPL_TEXT_BASE, MAS2_I | MAS2_G);
_mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
_mas7 = FSL_BOOKE_MAS7(flash_phys);
@@ -58,7 +58,7 @@ void setup_ifc(void)
MAS0_ESEL(CONFIG_SYS_PPC_E500_DEBUG_TLB);
_mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_IPROT |
MAS1_TSIZE(BOOKE_PAGESZ_4M);
- _mas2 = FSL_BOOKE_MAS2(CONFIG_TEXT_BASE, MAS2_I | MAS2_G);
+ _mas2 = FSL_BOOKE_MAS2(CONFIG_PPL_TEXT_BASE, MAS2_I | MAS2_G);
_mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
_mas7 = FSL_BOOKE_MAS7(flash_phys);
diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c
index 6078d5a200e..7ec27dcc2af 100644
--- a/arch/x86/cpu/apollolake/spl.c
+++ b/arch/x86/cpu/apollolake/spl.c
@@ -118,7 +118,7 @@ static int spl_fast_spi_load_image(struct spl_image_info *spl_image,
spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */
spl_image->entry_point = spl_phase() == PHASE_TPL ?
- CONFIG_SPL_TEXT_BASE : CONFIG_TEXT_BASE;
+ CONFIG_SPL_TEXT_BASE : CONFIG_PPL_TEXT_BASE;
spl_image->load_addr = spl_image->entry_point;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 0a1fbb34d40..332786de5d4 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -49,7 +49,7 @@ static void quark_setup_mtrr(void)
/* variable range MTRR#0: ROM area */
mask = ~(CONFIG_SYS_MONITOR_LEN - 1);
- base = CONFIG_TEXT_BASE & mask;
+ base = CONFIG_PPL_TEXT_BASE & mask;
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM),
base | MTRR_TYPE_WRBACK);
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ROM),
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 0ef27cc5a00..5401b34eb31 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -237,15 +237,15 @@ multiboot_header:
/* checksum */
.long -0x1BADB002 - (1 << 16)
/* header addr */
- .long multiboot_header - _x86boot_start + CONFIG_TEXT_BASE
+ .long multiboot_header - _x86boot_start + CONFIG_PPL_TEXT_BASE
/* load addr */
- .long CONFIG_TEXT_BASE
+ .long CONFIG_PPL_TEXT_BASE
/* load end addr */
.long 0
/* bss end addr */
.long 0
/* entry addr */
- .long CONFIG_TEXT_BASE
+ .long CONFIG_PPL_TEXT_BASE
#ifdef CONFIG_X86_LOAD_FROM_32_BIT
/*
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 5b1b420a643..c97f2db6d03 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -162,10 +162,10 @@ int do_elf_reloc_fixups(void)
if (re_src == re_end)
panic("No relocation data");
-#ifdef CONFIG_TEXT_BASE
- text_base = CONFIG_TEXT_BASE;
+#ifdef CONFIG_PPL_TEXT_BASE
+ text_base = CONFIG_PPL_TEXT_BASE;
#else
- panic("No CONFIG_TEXT_BASE");
+ panic("No CONFIG_PPL_TEXT_BASE");
#endif
#if CONFIG_IS_ENABLED(X86_64)
do_elf_reloc_fixups64(text_base, size, re_src, re_end);
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index bdf57ef7b5b..c91fc49ac6a 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -66,7 +66,7 @@ static int x86_spl_init(void)
* TODO(sjg at chromium.org): We use this area of RAM for the stack
* and global_data in SPL. Once U-Boot starts up and releocates it
* is not needed. We could make this a CONFIG option or perhaps
- * place it immediately below CONFIG_TEXT_BASE.
+ * place it immediately below CONFIG_PPL_TEXT_BASE.
*/
__maybe_unused char *ptr = (char *)0x110000;
#else
@@ -209,8 +209,8 @@ static int spl_board_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
spl_image->size = CONFIG_SYS_MONITOR_LEN;
- spl_image->entry_point = CONFIG_TEXT_BASE;
- spl_image->load_addr = CONFIG_TEXT_BASE;
+ spl_image->entry_point = CONFIG_PPL_TEXT_BASE;
+ spl_image->load_addr = CONFIG_PPL_TEXT_BASE;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c
index ea49c7a99c0..8be4249d178 100644
--- a/board/BuS/eb_cpu5282/eb_cpu5282.c
+++ b/board/BuS/eb_cpu5282/eb_cpu5282.c
@@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
int checkboard (void)
{
puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
-#if (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
+#if (CONFIG_PPL_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
puts(" Boot from Internal FLASH\n");
#endif
return 0;
diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
index 99fe1edfb33..a8236813e7f 100644
--- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
+++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
@@ -12,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_PPL_TEXT_BASE + 0x50000;
return 0;
}
diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c
index aead6f099e8..448ae4fdcd5 100644
--- a/board/broadcom/bcmstb/bcmstb.c
+++ b/board/broadcom/bcmstb/bcmstb.c
@@ -61,13 +61,13 @@ int dram_init_banksize(void)
/*
* On this SoC, U-Boot is running as an ELF file. Change the
- * relocation address to CONFIG_TEXT_BASE, so that in
+ * relocation address to CONFIG_PPL_TEXT_BASE, so that in
* setup_reloc, gd->reloc_off works out to 0, effectively
* disabling relocation. Otherwise U-Boot hangs in the setup
* instructions just before relocate_code in
* arch/arm/lib/crt0.S.
*/
- gd->relocaddr = CONFIG_TEXT_BASE;
+ gd->relocaddr = CONFIG_PPL_TEXT_BASE;
return 0;
}
diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c
index c0a8a497c7b..cc79c739bcf 100644
--- a/board/congatec/cgtqmx8/cgtqmx8.c
+++ b/board/congatec/cgtqmx8/cgtqmx8.c
@@ -425,7 +425,7 @@ int board_late_init(void)
char *end_of_uboot;
char command[256];
- end_of_uboot = (char *)(ulong)(CONFIG_TEXT_BASE + _end_ofs
+ end_of_uboot = (char *)(ulong)(CONFIG_PPL_TEXT_BASE + _end_ofs
+ fdt_totalsize(gd->fdt_blob));
end_of_uboot += 9;
diff --git a/board/freescale/ls1021atsn/ls1021atsn.c b/board/freescale/ls1021atsn/ls1021atsn.c
index d144f25c623..9d7e68978dc 100644
--- a/board/freescale/ls1021atsn/ls1021atsn.c
+++ b/board/freescale/ls1021atsn/ls1021atsn.c
@@ -188,7 +188,7 @@ void board_init_f(ulong dummy)
* in last boot.
*/
if (is_warm_boot()) {
- second_uboot = (void (*)(void))CONFIG_TEXT_BASE;
+ second_uboot = (void (*)(void))CONFIG_PPL_TEXT_BASE;
second_uboot();
}
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 4f5834347db..cf5f9f219b0 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -439,7 +439,7 @@ void board_init_f(ulong dummy)
* in last boot.
*/
if (is_warm_boot()) {
- second_uboot = (void (*)(void))CONFIG_TEXT_BASE;
+ second_uboot = (void (*)(void))CONFIG_PPL_TEXT_BASE;
second_uboot();
}
diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c
index 3372290120b..27df2c9bb45 100644
--- a/board/hoperun/hihope-rzg2/hihope-rzg2.c
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
@@ -39,7 +39,7 @@ int board_init(void)
u32 i;
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_PPL_TEXT_BASE + 0x50000;
/* Configure the HSUSB block */
mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index 991022ac833..29c201dc1e6 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -116,7 +116,7 @@ void check_for_uboot_update(void)
}
}
printf("Check update: starting factory image @%08x ...\n",
- CONFIG_TEXT_BASE);
+ CONFIG_PPL_TEXT_BASE);
} else if (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) {
/*
* When running in field updated u-boot, make sure that
@@ -124,7 +124,7 @@ void check_for_uboot_update(void)
*/
WARN_ON(bootcount > CONFIG_BOOTCOUNT_BOOTLIMIT);
printf("Check update: updated u-boot starting @%08x ...\n",
- CONFIG_TEXT_BASE);
+ CONFIG_PPL_TEXT_BASE);
}
}
#endif
diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S
index 44f32f114e7..31d681e4896 100644
--- a/board/nokia/rx51/lowlevel_init.S
+++ b/board/nokia/rx51/lowlevel_init.S
@@ -8,7 +8,7 @@
#include <linux/linkage.h>
kernoffs: /* offset of kernel image from this address */
- .word . - CONFIG_TEXT_BASE - KERNEL_OFFSET
+ .word . - CONFIG_PPL_TEXT_BASE - KERNEL_OFFSET
kernaddr: /* address of kernel after copying */
.word KERNEL_ADDRESS
@@ -37,13 +37,13 @@ ENTRY(save_boot_params)
*
* Nokia X-Loader is loading secondary image to address 0x80400000.
* NOLO is loading boot image to random place, so it doesn't really
- * matter what is set in CONFIG_TEXT_BASE. We have to detect
+ * matter what is set in CONFIG_PPL_TEXT_BASE. We have to detect
* KERNEL_OFFSET from the current execution address and copy it to
* absolute address KERNEL_ADDRESS.
*
* Note that U-Boot has to be compiled with CONFIG_POSITION_INDEPENDENT
* because it is loaded at random address and not to the fixed address
- * (CONFIG_TEXT_BASE).
+ * (CONFIG_PPL_TEXT_BASE).
*/
/* r0 - start of kernel before */
diff --git a/board/qualcomm/dragonboard820c/head.S b/board/qualcomm/dragonboard820c/head.S
index b052a858fd3..1af01994a44 100644
--- a/board/qualcomm/dragonboard820c/head.S
+++ b/board/qualcomm/dragonboard820c/head.S
@@ -20,7 +20,7 @@
_arm64_header:
b _start
.word 0
- .quad CONFIG_TEXT_BASE-PHYS_SDRAM_1 /* Image load offset, LE */
+ .quad CONFIG_PPL_TEXT_BASE-PHYS_SDRAM_1 /* Image load offset, LE */
.quad 0 /* Effective size of kernel image, little-endian */
.quad 0 /* kernel flags, little-endian */
.quad 0 /* reserved */
diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index b0cb4e747b6..466e3cd9d77 100644
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -84,7 +84,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_PPL_TEXT_BASE + 0x50000;
init_gic_v3();
diff --git a/board/silinux/ek874/ek874.c b/board/silinux/ek874/ek874.c
index 6dc804a0c06..80c8648af58 100644
--- a/board/silinux/ek874/ek874.c
+++ b/board/silinux/ek874/ek874.c
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_PPL_TEXT_BASE + 0x50000;
return 0;
}
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 9c4dd186fca..8875977c955 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -223,7 +223,7 @@ void *board_fdt_blob_setup(int *err)
void *fw_dtb;
*err = 0;
- fw_dtb = (void *)(CONFIG_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
+ fw_dtb = (void *)(CONFIG_PPL_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
if (fdt_magic(fw_dtb) != FDT_MAGIC) {
printf("DTB is not passed via %x\n", (u32)fw_dtb);
*err = -ENXIO;
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 5dcda12105b..ca1df0d65d9 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -66,7 +66,7 @@ int dram_init(void)
struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
- return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE);
+ return (struct legacy_img_hdr *)(CONFIG_PPL_TEXT_BASE);
}
int board_init(void)
diff --git a/cmd/sf.c b/cmd/sf.c
index 11b9c25896a..73a890b8ff5 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -558,7 +558,7 @@ static int do_spi_flash_test(int argc, char *const argv[])
return 1;
}
- from = map_sysmem(CONFIG_TEXT_BASE, 0);
+ from = map_sysmem(CONFIG_PPL_TEXT_BASE, 0);
memcpy(buf, from, len);
ret = spi_flash_test(flash, buf, len, offset, vbuf);
free(vbuf);
diff --git a/common/autoboot.c b/common/autoboot.c
index 5d331991c19..7bc6363e7de 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -428,19 +428,19 @@ static int abortboot(int bootdelay)
static void process_fdt_options(void)
{
-#ifdef CONFIG_TEXT_BASE
+#ifdef CONFIG_PPL_TEXT_BASE
ulong addr;
/* Add an env variable to point to a kernel payload, if available */
addr = ofnode_conf_read_int("kernel-offset", 0);
if (addr)
- env_set_addr("kernaddr", (void *)(CONFIG_TEXT_BASE + addr));
+ env_set_addr("kernaddr", (void *)(CONFIG_PPL_TEXT_BASE + addr));
/* Add an env variable to point to a root disk, if available */
addr = ofnode_conf_read_int("rootdisk-offset", 0);
if (addr)
- env_set_addr("rootaddr", (void *)(CONFIG_TEXT_BASE + addr));
-#endif /* CONFIG_TEXT_BASE */
+ env_set_addr("rootaddr", (void *)(CONFIG_PPL_TEXT_BASE + addr));
+#endif /* CONFIG_PPL_TEXT_BASE */
}
const char *bootdelay_process(void)
diff --git a/common/board_f.c b/common/board_f.c
index 2b4edf30c93..bedcedaa32f 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -127,8 +127,8 @@ static int display_text_info(void)
bss_start = (ulong)&__bss_start;
bss_end = (ulong)&__bss_end;
-#ifdef CONFIG_TEXT_BASE
- text_base = CONFIG_TEXT_BASE;
+#ifdef CONFIG_PPL_TEXT_BASE
+ text_base = CONFIG_PPL_TEXT_BASE;
#else
text_base = CONFIG_SYS_MONITOR_BASE;
#endif
@@ -689,7 +689,7 @@ static int reloc_bloblist(void)
static int setup_reloc(void)
{
if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
-#ifdef CONFIG_TEXT_BASE
+#ifdef CONFIG_PPL_TEXT_BASE
#ifdef ARM
gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
#elif defined(CONFIG_MICROBLAZE)
@@ -699,9 +699,9 @@ static int setup_reloc(void)
* On all ColdFire arch cpu, monitor code starts always
* just after the default vector table location, so at 0x400
*/
- gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
+ gd->reloc_off = gd->relocaddr - (CONFIG_PPL_TEXT_BASE + 0x400);
#elif !defined(CONFIG_SANDBOX)
- gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
+ gd->reloc_off = gd->relocaddr - CONFIG_PPL_TEXT_BASE;
#endif
#endif
}
diff --git a/common/board_r.c b/common/board_r.c
index c6c0c1ab1d9..8e022664ed2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -369,7 +369,7 @@ static int initr_flash(void)
#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
- bd->bi_flashoffset = CONFIG_TEXT_BASE + flash_size;
+ bd->bi_flashoffset = CONFIG_PPL_TEXT_BASE + flash_size;
#elif CONFIG_SYS_MONITOR_BASE == CFG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
#endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index a630e798661..27a5488307d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -44,7 +44,7 @@ DECLARE_GLOBAL_DATA_PTR;
DECLARE_BINMAN_MAGIC_SYM;
#ifndef CFG_SYS_UBOOT_START
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
#endif
u32 *boot_params_ptr = NULL;
@@ -188,7 +188,7 @@ ulong spl_get_image_text_base(void)
return CONFIG_VPL_TEXT_BASE;
#endif
return spl_next_phase() == PHASE_SPL ? CONFIG_SPL_TEXT_BASE :
- CONFIG_TEXT_BASE;
+ CONFIG_PPL_TEXT_BASE;
}
/*
@@ -225,7 +225,7 @@ __weak void spl_board_prepare_for_boot(void)
__weak struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
- return map_sysmem(CONFIG_TEXT_BASE + offset, 0);
+ return map_sysmem(CONFIG_PPL_TEXT_BASE + offset, 0);
}
#ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
@@ -251,7 +251,7 @@ void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
spl_image->load_addr = u_boot_pos;
} else {
spl_image->entry_point = CFG_SYS_UBOOT_START;
- spl_image->load_addr = CONFIG_TEXT_BASE;
+ spl_image->load_addr = CONFIG_PPL_TEXT_BASE;
}
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 2c10252834f..63fa9b720b2 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -254,7 +254,7 @@ uintptr_t spl_fit_images_get_entry(void *blob, int node)
void spl_invoke_atf(struct spl_image_info *spl_image)
{
uintptr_t bl32_entry = 0;
- uintptr_t bl33_entry = CONFIG_TEXT_BASE;
+ uintptr_t bl33_entry = CONFIG_PPL_TEXT_BASE;
void *blob = spl_image->fdt_addr;
uintptr_t platform_param = (uintptr_t)blob;
int node;
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index dc45204fc0e..73e4d96e843 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -157,11 +157,11 @@ static int spl_nand_load_image(struct spl_image_info *spl_image,
*/
nand_spl_load_image(CONFIG_CMD_SPL_NAND_OFS,
CONFIG_CMD_SPL_WRITE_SIZE,
- (void *)CONFIG_TEXT_BASE);
+ (void *)CONFIG_PPL_TEXT_BASE);
/* copy to destintion */
for (dst = (int *)CONFIG_SYS_SPL_ARGS_ADDR,
- src = (int *)CONFIG_TEXT_BASE;
- src < (int *)(CONFIG_TEXT_BASE +
+ src = (int *)CONFIG_PPL_TEXT_BASE;
+ src < (int *)(CONFIG_PPL_TEXT_BASE +
CONFIG_CMD_SPL_WRITE_SIZE);
src++, dst++) {
writel(readl(src), dst);
diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
index a269904d386..934f234494f 100644
--- a/common/spl/spl_optee.S
+++ b/common/spl/spl_optee.S
@@ -7,6 +7,6 @@
#include <asm/assembler.h>
ENTRY(spl_optee_entry)
- ldr lr, =CONFIG_TEXT_BASE
+ ldr lr, =CONFIG_PPL_TEXT_BASE
mov pc, r3
ENDPROC(spl_optee_entry)
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index c6929c1b987..ec8fd56de43 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -62,7 +62,7 @@
#define CFG_SYS_SDRAM_BASE 0x00000000
/* FLASH organization */
-#define CFG_SYS_FLASH_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_FLASH_BASE CONFIG_PPL_TEXT_BASE
/*
* For booting Linux, the board info and command line data
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 70b1c399241..100d35fc64c 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -199,15 +199,15 @@
"netdev=eth1\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
"tftpflash=tftp $loadaddr $uboot;" \
- "protect off " __stringify(CONFIG_TEXT_BASE) \
+ "protect off " __stringify(CONFIG_PPL_TEXT_BASE) \
" +$filesize; " \
- "erase " __stringify(CONFIG_TEXT_BASE) \
+ "erase " __stringify(CONFIG_PPL_TEXT_BASE) \
" +$filesize; " \
- "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
+ "cp.b $loadaddr " __stringify(CONFIG_PPL_TEXT_BASE) \
" $filesize; " \
- "protect on " __stringify(CONFIG_TEXT_BASE) \
+ "protect on " __stringify(CONFIG_PPL_TEXT_BASE) \
" +$filesize; " \
- "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
+ "cmp.b $loadaddr " __stringify(CONFIG_PPL_TEXT_BASE) \
" $filesize\0" \
"fdtaddr=780000\0" \
"fdtfile=" FDTFILE "\0" \
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 6f3e298a249..b3673147dc2 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -296,15 +296,15 @@
"netdev=eth0\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " __stringify(CONFIG_TEXT_BASE) \
+ "protect off " __stringify(CONFIG_PPL_TEXT_BASE) \
" +$filesize; " \
- "erase " __stringify(CONFIG_TEXT_BASE) \
+ "erase " __stringify(CONFIG_PPL_TEXT_BASE) \
" +$filesize; " \
- "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
+ "cp.b $loadaddr " __stringify(CONFIG_PPL_TEXT_BASE) \
" $filesize; " \
- "protect on " __stringify(CONFIG_TEXT_BASE) \
+ "protect on " __stringify(CONFIG_PPL_TEXT_BASE) \
" +$filesize; " \
- "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
+ "cmp.b $loadaddr " __stringify(CONFIG_PPL_TEXT_BASE) \
" $filesize\0" \
"consoledev=ttyS1\0" \
"ramdiskaddr=2000000\0" \
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 28f53ae78a1..3a00ca67a03 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -17,7 +17,7 @@
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
-#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
+#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_PPL_TEXT_BASE & 0xfff00000)
#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -45,9 +45,9 @@
/*
* Config the L3 Cache as L3 SRAM
*/
-#define CFG_SYS_INIT_L3_ADDR CONFIG_TEXT_BASE
+#define CFG_SYS_INIT_L3_ADDR CONFIG_PPL_TEXT_BASE
#ifdef CONFIG_PHYS_64BIT
-#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_TEXT_BASE)
+#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_PPL_TEXT_BASE)
#else
#define CFG_SYS_INIT_L3_ADDR_PHYS CFG_SYS_INIT_L3_ADDR
#endif
@@ -309,7 +309,7 @@
"bank_intlv=cs0_cs1\0" \
"netdev=eth0\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
- "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_PPL_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 7ee46abffdb..1b867e616cc 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -84,7 +84,7 @@
#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \
(0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR)
/* Set 1M boot space for PCIe boot */
-#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
+#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_PPL_TEXT_BASE & 0xfff00000)
#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -435,7 +435,7 @@
"hwconfig=fsl_ddr:ctlr_intlv=cacheline," \
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
- "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_PPL_TEXT_BASE) "\0" \
"bootargs=root=/dev/ram rw console=ttyS0,115200\0" \
"netdev=eth0\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index f196bd76e6e..b1ddcf5bd46 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -376,7 +376,7 @@
"usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
- "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_PPL_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 2023d7497f6..e0dfe6cbeca 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -49,7 +49,7 @@
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
-#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
+#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_PPL_TEXT_BASE & 0xfff00000)
#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -420,7 +420,7 @@
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
- "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_PPL_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index f213d2de770..04635a6c14b 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -49,7 +49,7 @@
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
-#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
+#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_PPL_TEXT_BASE & 0xfff00000)
#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -386,7 +386,7 @@
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
- "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_PPL_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 506f1b7e268..fa1da4dd8a2 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -375,7 +375,7 @@
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
- "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_PPL_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index b75c6483883..96154da42b9 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -25,7 +25,7 @@
#define CFG_SYS_NAND_ECCSIZE 512
#define CFG_SYS_NAND_ECCBYTES 13
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
/* NAND block size is 128 KiB. Synchronize these values with
* corresponding Device Tree entries in Linux:
* MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index b9cc7ba974d..3453fcba0a9 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -17,7 +17,7 @@
#include <asm/hardware.h>
/*
- * Warning: changing CONFIG_TEXT_BASE requires
+ * Warning: changing CONFIG_PPL_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index e7946389eff..1b535eabb08 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -202,7 +202,7 @@
#define CFG_SYS_NAND_ECCSIZE 512
#define CFG_SYS_NAND_ECCBYTES 14
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
#endif
#endif
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
index d1de3561af6..842cc5e9a0a 100644
--- a/include/configs/bcmstb.h
+++ b/include/configs/bcmstb.h
@@ -65,7 +65,7 @@ extern phys_addr_t prior_stage_fdt_address;
* : [~500 KiB in size, stripped]
* 0xc000 0000 Top of RAM
*
- * Setting gd->relocaddr to CONFIG_TEXT_BASE in dram_init_banksize
+ * Setting gd->relocaddr to CONFIG_PPL_TEXT_BASE in dram_init_banksize
* prevents U-Boot from relocating itself when it is run as an ELF
* program by the prior stage bootloader.
*
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index f2675e0ec86..985cd9cab1d 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -17,7 +17,7 @@
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_TEXT_BASE requires
+ * Warning: changing CONFIG_PPL_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
@@ -54,8 +54,8 @@
/* Defines for SPL */
#define CFG_SYS_NAND_U_BOOT_SIZE 0x80000
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
#define CFG_SYS_NAND_ECCSIZE 256
#define CFG_SYS_NAND_ECCBYTES 3
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index d85aeaafe51..cbf5661e236 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -78,11 +78,11 @@
* U-Boot Commands
*/
-/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_TEXT_BASE */
+/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_PPL_TEXT_BASE */
#define CFG_SYS_NAND_U_BOOT_SIZE 0x60000
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
/* See common/spl/spl.c spl_set_header_raw_uboot() */
diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h
index f304929263e..203fe9c63b9 100644
--- a/include/configs/evb_ast2500.h
+++ b/include/configs/evb_ast2500.h
@@ -11,7 +11,7 @@
#include <configs/aspeed-common.h>
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/* Misc */
#define CFG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h
index e1cce58fa93..ee94bba7632 100644
--- a/include/configs/evb_ast2600.h
+++ b/include/configs/evb_ast2600.h
@@ -8,7 +8,7 @@
#include <configs/aspeed-common.h>
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/* Misc */
#define STR_HELPER(s) #s
diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h
index 89e531649a6..3e00d2e47c1 100644
--- a/include/configs/gardena-smart-gateway-at91sam.h
+++ b/include/configs/gardena-smart-gateway-at91sam.h
@@ -38,7 +38,7 @@
#define CFG_SYS_MCKR_CSS 0x1302
#define CFG_SYS_NAND_U_BOOT_SIZE 0xa0000
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
#endif
diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h
index 0ba4efe67ac..d910eaa280b 100644
--- a/include/configs/gardena-smart-gateway-mt7688.h
+++ b/include/configs/gardena-smart-gateway-mt7688.h
@@ -13,7 +13,7 @@
/* SPL */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* Dummy value */
#define CFG_SYS_UBOOT_BASE 0
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 36bf22b1870..a473e8a63ca 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -15,7 +15,7 @@
/* Physical Memory Map */
-/* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */
+/* CONFIG_PPL_TEXT_BASE needs to align with where ATF loads bl33.bin */
#define PHYS_SDRAM_1 0x00000000
diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h
index 40d5e653c3f..34daca7a14c 100644
--- a/include/configs/hikey960.h
+++ b/include/configs/hikey960.h
@@ -11,7 +11,7 @@
/* Physical Memory Map */
-/* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */
+/* CONFIG_PPL_TEXT_BASE needs to align with where ATF loads bl33.bin */
#define PHYS_SDRAM_1 0x00000000
#define PHYS_SDRAM_1_SIZE 0xC0000000
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h
index 786b70fe064..8079771c84d 100644
--- a/include/configs/imx6-engicam.h
+++ b/include/configs/imx6-engicam.h
@@ -127,7 +127,7 @@
/* NAND */
#ifdef CONFIG_NAND_MXS
# define CFG_SYS_NAND_BASE 0x40000000
-# define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+# define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
/* MTD device */
#endif
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 85c054451f3..dc2c67bde6c 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -113,7 +113,7 @@
/* NAND stuff */
#define CFG_SYS_NAND_BASE 0x40000000
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
/* USB Configs */
#ifdef CONFIG_CMD_USB
diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h
index 1c92cd78767..a39753c9056 100644
--- a/include/configs/kontron-sl-mx6ul.h
+++ b/include/configs/kontron-sl-mx6ul.h
@@ -19,7 +19,7 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/* Board and environment settings */
#define CFG_MXC_UART_BASE UART4_BASE
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h
index f16c7e91221..ea2562aae9c 100644
--- a/include/configs/linkit-smart-7688.h
+++ b/include/configs/linkit-smart-7688.h
@@ -13,7 +13,7 @@
/* SPL */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* Dummy value */
#define CFG_SYS_UBOOT_BASE 0
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index e4e5522a238..451913e8fa6 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -12,8 +12,8 @@
#ifdef CONFIG_NAND_BOOT
#define CFG_SYS_NAND_U_BOOT_SIZE (400 << 10)
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
#endif
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index ac2319c1b42..dcdd99cf714 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -43,8 +43,8 @@
/* NAND SPL */
#ifdef CONFIG_NAND_BOOT
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
#endif
/* GPIO */
@@ -57,7 +57,7 @@
* CFG_SYS_FLASH_BASE has the final address (core view)
* CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
+ * CONFIG_PPL_TEXT_BASE is linked to 0x60000000 for booting
*/
#define CFG_SYS_FLASH_BASE 0x60000000
#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 38fb1d45bcb..fb04531cb85 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -43,8 +43,8 @@
/* NAND SPL */
#ifdef CONFIG_NAND_BOOT
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
#endif
/* GPIO */
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 4b4bd7cbe48..57c439bc562 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -32,7 +32,7 @@
* CFG_SYS_FLASH_BASE has the final address (core view)
* CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
+ * CONFIG_PPL_TEXT_BASE is linked to 0x60000000 for booting
*/
#define CFG_SYS_FLASH_BASE 0x60000000
#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 720a95d2f53..4e58db27c6c 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -66,7 +66,7 @@
* CFG_SYS_FLASH_BASE has the final address (core view)
* CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_TEXT_BASE is linked to 0x30000000 for booting
+ * CONFIG_PPL_TEXT_BASE is linked to 0x30000000 for booting
*/
#define CFG_SYS_FLASH_BASE 0x580000000ULL
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index f51eb31ed06..f086b3b7bb7 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -58,7 +58,7 @@
* CFG_SYS_FLASH_BASE has the final address (core view)
* CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_TEXT_BASE is linked to 0x30000000 for booting
+ * CONFIG_PPL_TEXT_BASE is linked to 0x30000000 for booting
*/
#define CFG_SYS_FLASH_BASE 0x580000000ULL
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 38da55c70bf..d1f53f9215b 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -21,7 +21,7 @@
#include <asm/hardware.h>
/*
- * Warning: changing CONFIG_TEXT_BASE requires
+ * Warning: changing CONFIG_PPL_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 6740ab2be3e..feb71ecddd2 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -93,6 +93,6 @@
/* SPL part */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
#endif /* __CONFIG_H */
diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h
index d5bd4926348..2dee5a513e5 100644
--- a/include/configs/mt7620.h
+++ b/include/configs/mt7620.h
@@ -14,7 +14,7 @@
/* SPL */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* Dummy value */
#define CFG_SYS_UBOOT_BASE 0
diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h
index 65415129534..be8febb514c 100644
--- a/include/configs/mt7622.h
+++ b/include/configs/mt7622.h
@@ -10,10 +10,10 @@
#define __MT7622_H
/* Uboot definition */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/* SPL -> Uboot */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
index 9df2715fc7d..5e3c039bd65 100644
--- a/include/configs/mt7628.h
+++ b/include/configs/mt7628.h
@@ -24,7 +24,7 @@
/* SPL */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* Dummy value */
#define CFG_SYS_UBOOT_BASE 0
diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h
index 14c885ec55c..2dbbeb7b85e 100644
--- a/include/configs/mt7981.h
+++ b/include/configs/mt7981.h
@@ -10,10 +10,10 @@
#define __MT7981_H
/* Uboot definition */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/* SPL -> Uboot */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h
index 0c41af1fc32..229c019afb8 100644
--- a/include/configs/mt7986.h
+++ b/include/configs/mt7986.h
@@ -10,10 +10,10 @@
#define __MT7986_H
/* Uboot definition */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/* SPL -> Uboot */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h
index c0fc8688ca6..b210a728548 100644
--- a/include/configs/mt8512.h
+++ b/include/configs/mt8512.h
@@ -10,7 +10,7 @@
#define __MT8512_H
/* Uboot definition */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
#define ENV_BOOT_READ_IMAGE \
"boot_rd_img=mmc dev 0" \
diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index 3dfcb138b49..669303091d6 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -23,7 +23,7 @@
*/
/*
- * Custom CONFIG_TEXT_BASE can be done in <board>.h
+ * Custom CONFIG_PPL_TEXT_BASE can be done in <board>.h
*/
/* additions for new ARM relocation support */
diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h
index c4db38562d8..c11146eef51 100644
--- a/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@ -10,7 +10,7 @@
/** Maximum size of image supported for bootm (and bootable FIT images) */
/** Memory base address */
-#define CFG_SYS_SDRAM_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_SDRAM_BASE CONFIG_PPL_TEXT_BASE
/** Stack starting address */
diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h
index 0be26ef3287..5c60de850b4 100644
--- a/include/configs/octeontx_common.h
+++ b/include/configs/octeontx_common.h
@@ -36,7 +36,7 @@
/** Maximum size of image supported for bootm (and bootable FIT images) */
/** Memory base address */
-#define CFG_SYS_SDRAM_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_SDRAM_BASE CONFIG_PPL_TEXT_BASE
/** Stack starting address */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index f5bd0913449..590117d1034 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -81,8 +81,8 @@
#ifdef CONFIG_SDCARD
#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10)
-#define CFG_SYS_MMC_U_BOOT_DST CONFIG_TEXT_BASE
-#define CFG_SYS_MMC_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_MMC_U_BOOT_DST CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_MMC_U_BOOT_START CONFIG_PPL_TEXT_BASE
#ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR
#define CFG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512)
#else
@@ -90,8 +90,8 @@
#endif
#elif defined(CONFIG_SPIFLASH)
#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
-#define CFG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_TEXT_BASE
-#define CFG_SYS_SPI_FLASH_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_SPI_FLASH_U_BOOT_START CONFIG_PPL_TEXT_BASE
#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
@@ -399,11 +399,11 @@
"loadaddr=1000000\0" \
"bootfile=uImage\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \
- "erase " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) " $filesize; " \
- "protect on " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) " $filesize\0" \
+ "protect off " __stringify(CONFIG_PPL_TEXT_BASE) " +$filesize; " \
+ "erase " __stringify(CONFIG_PPL_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " __stringify(CONFIG_PPL_TEXT_BASE) " $filesize; " \
+ "protect on " __stringify(CONFIG_PPL_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " __stringify(CONFIG_PPL_TEXT_BASE) " $filesize\0" \
"hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 032d228f477..211400d2514 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -24,7 +24,7 @@
/* Memory layout */
#define CFG_SYS_SDRAM_BASE 0x00000000
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_BASE CONFIG_PPL_TEXT_BASE
/*
* The board really has 256M. However, the VC (VideoCore co-processor) shares
* the RAM, and uses a configurable portion at the top. We tell U-Boot that a
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 7def657bcd1..39bb0e67eaa 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -56,7 +56,7 @@
#define CFG_SYS_NAND_ECCSIZE 512
#define CFG_SYS_NAND_ECCBYTES 14
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 75a1670e331..06ac6510de3 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -30,7 +30,7 @@
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot
+ * Warning: changing CONFIG_PPL_TEXT_BASE requires adapting the initial boot
* program. Since the linker has to swallow that define, we must use a pure
* hex number here!
*/
@@ -89,8 +89,8 @@
/* Defines for SPL */
#define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
#define CFG_SYS_NAND_ECCSIZE 256
#define CFG_SYS_NAND_ECCBYTES 3
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 174b848e259..1cb2ee6b2c8 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -22,7 +22,7 @@
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_TEXT_BASE requires
+ * Warning: changing CONFIG_PPL_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
@@ -123,8 +123,8 @@
/* Defines for SPL */
#define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
#define CFG_SYS_NAND_ECCSIZE 256
#define CFG_SYS_NAND_ECCBYTES 3
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index d54c208ef66..55ca934c0c9 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -123,7 +123,7 @@
/* General parts of the framework, required. */
#ifdef CONFIG_MTD_RAW_NAND
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
#endif
#endif /* !CONFIG_NOR_BOOT */
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
index 43050d61c37..9011fb0fa89 100644
--- a/include/configs/vocore2.h
+++ b/include/configs/vocore2.h
@@ -13,7 +13,7 @@
/* SPL */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
+#define CFG_SYS_UBOOT_START CONFIG_PPL_TEXT_BASE
/* Dummy value */
#define CFG_SYS_UBOOT_BASE 0
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index f1a7853a80e..20092f1b5e2 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -60,9 +60,9 @@
/* Use the framework and generic lib */
/* SPL will use serial */
/* SPL will load U-Boot from NAND offset 0x40000 */
-/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_TEXT_BASE */
-#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_PPL_TEXT_BASE */
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_PPL_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST CONFIG_PPL_TEXT_BASE
/*
* Include SoC specific configuration
diff --git a/include/spl.h b/include/spl.h
index 827bd25c883..17d6fd59d4d 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -323,7 +323,7 @@ ulong spl_get_image_size(void);
* spl_get_image_text_base() - get the text base of the next phase
*
* This returns the address that the next stage is linked to run at, i.e.
- * CONFIG_SPL_TEXT_BASE or CONFIG_TEXT_BASE
+ * CONFIG_SPL_TEXT_BASE or CONFIG_PPL_TEXT_BASE
*
* Return: text-base address
*/
@@ -471,7 +471,7 @@ void spl_set_bd(void);
*
* This sets up the given spl_image which the standard values obtained from
* config options: CONFIG_SYS_MONITOR_LEN, CFG_SYS_UBOOT_START,
- * CONFIG_TEXT_BASE.
+ * CONFIG_PPL_TEXT_BASE.
*
* @spl_image: Image description to set up
*/
diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c
index c9eb32ec104..f5a76c39f6f 100644
--- a/lib/efi/efi_stub.c
+++ b/lib/efi/efi_stub.c
@@ -126,7 +126,7 @@ static void jump_to_uboot(ulong cs32, ulong addr, ulong info)
((func_t)addr)(0, 0, info);
#else
- cpu_call32(cs32, CONFIG_TEXT_BASE, info);
+ cpu_call32(cs32, CONFIG_PPL_TEXT_BASE, info);
#endif
}
@@ -184,8 +184,8 @@ static int get_codeseg32(void)
if ((desc & GDT_PRESENT) && (desc & GDT_NOTSYS) &&
!(desc & GDT_LONG) && (desc & GDT_4KB) &&
(desc & GDT_32BIT) && (desc & GDT_CODE) &&
- CONFIG_TEXT_BASE > base &&
- CONFIG_TEXT_BASE + CONFIG_SYS_MONITOR_LEN < limit
+ CONFIG_PPL_TEXT_BASE > base &&
+ CONFIG_PPL_TEXT_BASE + CONFIG_SYS_MONITOR_LEN < limit
) {
cs32 = i;
break;
@@ -360,7 +360,7 @@ efi_status_t EFIAPI efi_main(efi_handle_t image,
priv->memmap_desc, priv->memmap_size);
add_entry_addr(priv, EFIET_END, NULL, 0, 0, 0);
- memcpy((void *)CONFIG_TEXT_BASE, _binary_u_boot_bin_start,
+ memcpy((void *)CONFIG_PPL_TEXT_BASE, _binary_u_boot_bin_start,
(ulong)_binary_u_boot_bin_end -
(ulong)_binary_u_boot_bin_start);
@@ -371,7 +371,7 @@ efi_status_t EFIAPI efi_main(efi_handle_t image,
printhex8(priv->info->total_size);
#endif
putc('\n');
- jump_to_uboot(cs32, CONFIG_TEXT_BASE, (ulong)priv->info);
+ jump_to_uboot(cs32, CONFIG_PPL_TEXT_BASE, (ulong)priv->info);
return EFI_LOAD_ERROR;
}
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index ad2ab825d19..8a713b35a8b 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -672,12 +672,12 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map)
struct elf_rela *rel = (void*)&__efi_runtime_rel_start;
#else
struct elf_rel *rel = (void*)&__efi_runtime_rel_start;
- static ulong lastoff = CONFIG_TEXT_BASE;
+ static ulong lastoff = CONFIG_PPL_TEXT_BASE;
#endif
debug("%s: Relocating to offset=%lx\n", __func__, offset);
for (; (ulong)rel < (ulong)&__efi_runtime_rel_stop; rel++) {
- ulong base = CONFIG_TEXT_BASE;
+ ulong base = CONFIG_PPL_TEXT_BASE;
ulong *p;
ulong newaddr;
@@ -696,7 +696,7 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map)
switch (rel->info & R_MASK) {
case R_RELATIVE:
#ifdef IS_RELA
- newaddr = rel->addend + offset - CONFIG_TEXT_BASE;
+ newaddr = rel->addend + offset - CONFIG_PPL_TEXT_BASE;
#else
newaddr = *p - lastoff + offset;
#endif
@@ -707,7 +707,7 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map)
extern struct dyn_sym __dyn_sym_start[];
newaddr = __dyn_sym_start[symidx].addr + offset;
#ifdef IS_RELA
- newaddr -= CONFIG_TEXT_BASE;
+ newaddr -= CONFIG_PPL_TEXT_BASE;
#endif
break;
}
diff --git a/lib/trace.c b/lib/trace.c
index b9dc6d2e4b5..a5c36b5d551 100644
--- a/lib/trace.c
+++ b/lib/trace.c
@@ -54,7 +54,7 @@ static inline uintptr_t __attribute__((no_instrument_function))
if (gd->flags & GD_FLG_RELOC)
offset -= gd->relocaddr;
else
- offset -= CONFIG_TEXT_BASE;
+ offset -= CONFIG_PPL_TEXT_BASE;
#endif
return offset / FUNC_SITE_SIZE;
}
@@ -123,7 +123,7 @@ static void notrace add_textbase(void)
if (hdr->ftrace_count < hdr->ftrace_size) {
struct trace_call *rec = &hdr->ftrace[hdr->ftrace_count];
- rec->func = CONFIG_TEXT_BASE;
+ rec->func = CONFIG_PPL_TEXT_BASE;
rec->caller = 0;
rec->flags = FUNCF_TEXTBASE;
}
--
2.39.1.519.gcb327c4b5f-goog
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