[PATCH v2 00/17] Basic StarFive JH7110 RISC-V SoC support

Conor Dooley conor at kernel.org
Fri Feb 10 18:41:35 CET 2023


On Sun, Jan 22, 2023 at 06:42:04PM +0000, Conor Dooley wrote:
> On Sat, Jan 21, 2023 at 10:05:47PM +0000, Conor Dooley wrote:
> > > > Apologies if I have missed it somewhere - but where is patch 12?
> > > > I don't see it on lore.kernel.org nor in my inbox :(
> > 
> > > https://lore.kernel.org/all/20230118082907.31629-1-yanhong.wang@starfivetech.com/
> > 
> > Oh, thanks! Hopefully I can provide a tested-by so...
> 
> Well it gets to console etc and there's not really much more than that
> to really test until some of the peripheral support patches arrive.
> Ethernet in particular would be great ;). So for non-SPL:
> Tested-by: Conor Dooley <conor.dooley at microchip.com>
> 
> I can't test the SPL though unfortunately, as the program required to
> "package" it has no source code AFAICT and doesn't run on my system.

StarFive released the source for this yesterday [1] and I was able to
successfully test the SPL too. Happy upgrade my qualified tested-by to
one for the whole series:
Tested-by: Conor Dooley <conor.dooley at microchip.com>

This patchset is far more stable than the SPL shipped with the board,
which I suspect has issues with "training"/initialisation of the DDR.

U-Boot proper was boot looping during either tftp or bootm loados more
than 90% of the time with the SPL the vendor ships but seems to be
stable with this version? It is with fingers crossed at the very least.

Cheers,
Conor.

1 - https://github.com/starfive-tech/Tools/tree/master/spl_tool
> > > Not sure why it isn't with the rest of the series.
> > 
> > Ehh, well it seems to be missing an In-Reply-To header, so perhaps it
> > was missing from the directory or w/e they ran send-email from & only
> > sent at a later date.
> > 
> > FWIW Yanhong, git send-email allows you to set that header so that
> > things do get threaded properly. AFAIU it's --in-reply-to=<msg-id>
> > 
> > Happy New Year,
> > Conor.
> > 
> 
> 


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