[PATCH V4 0/2] spi: cqspi: Fix register reads in STIG Mode

Dhruva Gole d-gole at ti.com
Tue Jan 3 07:31:10 CET 2023

Intent of these patches is to fix register reads in STIG mode and also
use STIG mode while reading flash registers.
Currently if you try to read a register while in STIG mode there is no
support for ADDR and thus naturally a register never gets read from the

This series supercedes the previously sent:

Logs demonstrating the usage and working of QSPI-NOR Flash (Cypress
s25hs512t) can be found on the link below:

change log:

* Improve the commit message for PATCH 2/2
* Address Pratyush's review to use <= CQSPI_STIG_DATA_LEN_MAX instead.

v3: Improvements over the last 2 versions, I have added a bit mask to
make sure nbytes dont overflow bit fields. Also minor improvements in
wording of comments and commit log.

v2: add the setup ADDR bits patch because STIG read of registers wasn't
present earlier.

v1: use STIG mode if reads are small.

Dhruva Gole (2):
  spi: cadence_qspi: setup ADDR Bits in cmd reads
  spi: cadence_qspi: use STIG mode for small reads

 drivers/spi/cadence_qspi.c     |  8 +++++++-
 drivers/spi/cadence_qspi_apb.c | 13 +++++++++++++
 2 files changed, 20 insertions(+), 1 deletion(-)


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