[PATCH 0/6] Add SGMII support for MAIN CPSW on TI's J7200 SoC

[Siddharth Vadapalli]

Hello,

This series adds support for SGMII mode to the CPSW driver to enable the
functionality on TI's J7200 SoC.

Supporting SGMII mode also requires changes to the WIZ driver which acts
as a wrapper for the SerDes used by the CPSW MAC to transmit data to the
Ethernet PHY daughtercard mounted on the I2C GPIO Expander 2 connector on
the J7200 EVM.

Powering on and resetting the Ethernet PHY requires MDIO support which
is added to the CPSW driver.

For supporting DMA transactions from the MAIN CPSW instance to the A72
Host on J7200 SoC, the corresponding PSI-L endpoint information is
added for the J721E SoC, which is applicable to J7200 SoC as well.

The SGMII daughtercard used for testing SGMII mode has TI's DP83869 PHY.
Thus, enable the config for DP83869 driver functionality. Also, enable
GPIO HOG config.

**NOTE**: This series is based on top of commit:
0beb649053 MAINTAINERS: correct at91 tree link
and depends on the following patch being merged as well:
Link: https://patchwork.ozlabs.org/project/uboot/patch/20230614222853.574427-1-dannenberg@ti.com/

Regards,
Siddharth.

Siddharth Vadapalli (4):
  net: ti: am65-cpsw-nuss: Add support for SGMII mode
  phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
  phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J721E
  configs: j7200_evm_a72: Enable configs for SGMII support with MAIN
    CPSW0

Suman Anna (2):
  dma: ti: Update J21E PSIL endpoint information for MAIN CPSW0
  net: ti: am65-cpsw-nuss: Add logic to support MDIO reset

 configs/j7200_evm_a72_defconfig |  2 ++
 drivers/dma/ti/k3-psil-j721e.c  | 17 ++++++++--
 drivers/net/ti/am65-cpsw-nuss.c | 57 ++++++++++++++++++++++++++++++++-
 drivers/phy/ti/phy-j721e-wiz.c  | 21 ++++++++----
 4 files changed, 87 insertions(+), 10 deletions(-)

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2.34.1