[PATCH 06/17] arm64: zynqmp: Increase reset assert time for TI SGMII PHY

[Michal Simek]

From: Harini Katakam <harini.katakam at amd.com>

Increase reset assert time for TI SGMII PHY on KR260 CC starting
6.1 kernel. This PHY does not come out of reset with the existing
100us pulse width as per testing on multiple carrier cards. The reset
is driven via a PCA9570 I2C expander. The expander driver was updated
to an upstream version in 6.1 where gpio_chip _set was optimized.
Delays in earlier kernels may have masked this issue. This is a safe
workaround value for assert pulse width before the discussions are
resolved with TI.

Signed-off-by: Harini Katakam <harini.katakam at amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey at amd.com>
Signed-off-by: Michal Simek <michal.simek at amd.com>
---

 arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 2 +-
 arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
index caaf71d729e4..d318773bd9d6 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
@@ -210,7 +210,7 @@
 			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
 			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 			ti,dp83867-rxctrl-strap-quirk;
-			reset-assert-us = <100>;
+			reset-assert-us = <300>;
 			reset-deassert-us = <280>;
 			reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>;
 		};
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
index f9d87559a719..69dba0761b37 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
@@ -210,7 +210,7 @@
 			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
 			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 			ti,dp83867-rxctrl-strap-quirk;
-			reset-assert-us = <100>;
+			reset-assert-us = <300>;
 			reset-deassert-us = <280>;
 			reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>;
 		};
-- 
2.36.1