[RESEND PATCH v2 0/5] imx8mn-var-som: fix ethernet for Variscite symphony board and imx8m nano SOM

[Hugo Villeneuve]

From: Hugo Villeneuve <hvilleneuve at dimonoff.com>

Hello,
This patch series fixes bugs and add missing features related to the ethernet
PHY on Variscite symphony carrier board with an imx8m nano SOM
(P/N VAR-SOM-MX8M-NANO).

Ethernet functionality is currently broken for the VAR-SOM-MX8M-NANO.

Variscite imx8m nano SOM comes in multiple hardware configuration options.
One of this hardware configuration option is called EC:
    EC: Ethernet Controller PHY assembled on SOM

For SOM with the EC configuration, the ethernet PHY is located on the
SOM itself, and connected to the CPU ethernet controller. It has a
reset line controlled via GPIO1_IO9. In this configuration, the PHY
located on the carrier board is not connected to anything and is
therefore not used.

For SOM without EC configuration, the ethernet PHY on the carrier
board is connected to the CPU ethernet controller. It has a reset line
controlled via the GPIO expander PCA9534_IO5.

Patch 1 add code to read and display the SOM configuration stored in the SOM
EEPROM. Part of this patch was submitted and accepted to the Linux kernel
(section that adds the EEPROM to the device tree), so that it will be easier to
sync the DT between kernel and U-Boot.

Patch 2 fixes bugs with the PHY reset properties.

Patch 3 fixes a bug with a missing PHY reset deassert delay (also submitted and
accepted to kernel).

Patch 4 enables automatic read of PHY MAC address from the SOM EEPROM.

Patch 5 is used for auto-detecting at runtime the SOM hardware configuration
option related to the PHY (EC), and dynamically adjust the device tree to
support both SOM PHY options.

I have succesfully tested the changes on a Variscite symphony carrier board with
a VAR-SOM-MX8M-NANO having the EC configuration option.

Unfortunately, I do not have a VAR-SOM-MX8M-NANO with a non-EC configuration
option so I couldn't test it on real hardware, altough I simulated it and
confirmed that the device tree fixing seems to be correct by using debug/print
statements.

Thank you.

Link: [v1] https://lore.kernel.org/u-boot/20230501200121.3137519-1-hugo@hugovil.com/

Changes for V2:
- Resend since I received 0 answers/comments after almost 4 weeks and I have a
  few minor updates to add:
  - Update defconfig using savedefconfig
  - Remove requirement about required patch (now in master)
  - Update status of patches also sent to the Linux kernel

Hugo Villeneuve (5):
  imx8mn-var-som: read and print SoM infos from eeprom on startup
  imx8mn-var-som: fix non-applied PHY reset-gpios properties
  arm: dts: imx8mn-var-som: fix PHY detection bug by adding deassert
    delay
  imx8mn-var-som: read eth MAC address from EEPROM
  imx8mn-var-som: adjust PHY reset gpios according to hardware
    configuration

 .../dts/imx8mn-var-som-symphony-u-boot.dtsi   |  17 ++
 arch/arm/dts/imx8mn-var-som-symphony.dts      |   4 -
 arch/arm/dts/imx8mn-var-som.dtsi              |  18 +-
 arch/arm/mach-imx/imx8m/Kconfig               |   4 +
 .../variscite/imx8mn_var_som/imx8mn_var_som.c | 214 ++++++++++++++++++
 configs/imx8mn_var_som_defconfig              |   4 +
 6 files changed, 256 insertions(+), 5 deletions(-)


base-commit: 7876a695468c9bc17a6dc02054da101450468a40
-- 
2.30.2