[PATCH v2 3/5] arm: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay
sbabic at denx.de
sbabic at denx.de
Tue Jul 11 21:42:12 CEST 2023
> From: Hugo Villeneuve <hvilleneuve at dimonoff.com>
> While testing the ethernet interface on a Variscite symphony carrier
> board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware
> configuration), the ethernet PHY is not detected.
> The ADIN1300 datasheet indicate that the "Management interface
> active (t4)" state is reached at most 5ms after the reset signal is
> deasserted.
> The device tree in Variscite custom git repository uses the following
> property:
> phy-reset-post-delay = <20>;
> Add a new MDIO property 'reset-deassert-us' of 20ms to have the same
> delay inside the ethphy node. Adding this property fixes the problem
> with the PHY detection.
> Note that this SOM can also have an Atheros AR8033 PHY. In this case,
> a 1ms deassert delay is sufficient. Add a comment to that effect.
> Fixes: c4c1ed68c1e8 ("imx8mn_var_som: Add support for Variscite
> VAR-SOM-MX8M-NANO board")
> Signed-off-by: Hugo Villeneuve <hvilleneuve at dimonoff.com>
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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