[PATCH v2 3/6] mtd: nand: pxa3xx: Add support for the Marvell AC5 SoC

[Michael Nazzareno Trimarchi]

Hi

On Thu, Jul 13, 2023 at 10:17 AM Stefan Roese <sr at denx.de> wrote:
>
> On 7/10/23 00:47, Chris Packham wrote:
> > The NAND flash controller (NFC) on the AC5/AC5X SoC is the same as
> > the NFC used on other Marvell SoCs. It does have the additional
> > restriction of only supporting SDR timing modes up to 3.
> >
> > Signed-off-by: Chris Packham <judge.packham at gmail.com>
>
> Reviewed-by: Stefan Roese <sr at denx.de>
>

 Reviewed-by: Michael Trimarchi <michael at amarulasolutions.com>

Michael

> Thanks,
> Stefan
>
> > ---
> >   drivers/mtd/nand/raw/pxa3xx_nand.c | 17 ++++++++++++++---
> >   1 file changed, 14 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
> > index fcd1b9c63614..9dee580ab9c2 100644
> > --- a/drivers/mtd/nand/raw/pxa3xx_nand.c
> > +++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
> > @@ -167,6 +167,7 @@ enum pxa3xx_nand_variant {
> >       PXA3XX_NAND_VARIANT_PXA,
> >       PXA3XX_NAND_VARIANT_ARMADA370,
> >       PXA3XX_NAND_VARIANT_ARMADA_8K,
> > +     PXA3XX_NAND_VARIANT_AC5,
> >   };
> >
> >   struct pxa3xx_nand_host {
> > @@ -391,6 +392,10 @@ static const struct udevice_id pxa3xx_nand_dt_ids[] = {
> >               .compatible = "marvell,armada-8k-nand-controller",
> >               .data = PXA3XX_NAND_VARIANT_ARMADA_8K,
> >       },
> > +     {
> > +             .compatible = "marvell,mvebu-ac5-pxa3xx-nand",
> > +             .data = PXA3XX_NAND_VARIANT_AC5,
> > +     },
> >       {}
> >   };
> >
> > @@ -505,6 +510,9 @@ static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)
> >               if (mode < 0)
> >                       mode = 0;
> >
> > +             if (info->variant == PXA3XX_NAND_VARIANT_AC5)
> > +                     mode = min(mode, 3);
> > +
> >               timings = onfi_async_timing_mode_to_sdr_timings(mode);
> >               if (IS_ERR(timings))
> >                       return PTR_ERR(timings);
> > @@ -730,7 +738,8 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info)
> >
> >               /* NDCB3 register is available in NFCv2 (Armada 370/XP SoC) */
> >               if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370 ||
> > -                     info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K)
> > +                     info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K ||
> > +                     info->variant == PXA3XX_NAND_VARIANT_AC5)
> >                       nand_writel(info, NDCB0, info->ndcb3);
> >       }
> >
> > @@ -1579,7 +1588,8 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
> >
> >       /* Device detection must be done with ECC disabled */
> >       if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370 ||
> > -             info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K)
> > +             info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K ||
> > +             info->variant == PXA3XX_NAND_VARIANT_AC5)
> >               nand_writel(info, NDECCCTRL, 0x0);
> >
> >       if (nand_scan_ident(mtd, 1, NULL))
> > @@ -1630,7 +1640,8 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
> >        */
> >       if (mtd->writesize > info->chunk_size) {
> >               if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370 ||
> > -                     info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K) {
> > +                     info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K ||
> > +                     info->variant == PXA3XX_NAND_VARIANT_AC5) {
> >                       chip->cmdfunc = nand_cmdfunc_extended;
> >               } else {
> >                       dev_err(mtd->dev,
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH,      Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael at amarulasolutions.com
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