[PATCH 1/1] doc: riscv: running SiFive Unleashed image in QEMU

[Bin Meng]

On Thu, Jul 13, 2023 at 9:28 PM Heinrich Schuchardt
<heinrich.schuchardt at canonical.com> wrote:
>
> Describe how to run the SiFive Unleashed image in QEMU.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt at canonical.com>
> ---
>  doc/board/sifive/unleashed.rst | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/doc/board/sifive/unleashed.rst b/doc/board/sifive/unleashed.rst
> index ce38b701d7..3daf7ffde2 100644
> --- a/doc/board/sifive/unleashed.rst
> +++ b/doc/board/sifive/unleashed.rst
> @@ -574,4 +574,15 @@ Change DIP switches MSEL[3:0] are set to 0110
>
>  Power up the board.
>
> +Running in QEMU
> +---------------
> +
> +QEMU provides the sifive_u (RISC-V Board compatible with SiFive U SDK) machine
> +that can be used for testing U-Boot:
> +
> +.. code-block:: bash
> +
> +    qemu-system-riscv64 -M sifive_u -m 8G -nographic \
> +    -kernel u-boot.bin
> +
>  [1] https://github.com/amarula/bsp-sifive
> --

Please refer to
https://www.qemu.org/docs/master/system/riscv/sifive_u.html which
contains various ways of running U-Boot including:

- running 64-bit U-Boot SPL and proper unmodified just like on the real board
- running 32-bit U-Boot proper
- running 64-bit U-Boot proper (the example you gave)

Regards,
Bin