[PATCH v2 2/4] net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V

Leo Liang ycliang at andestech.com
Mon Jul 24 04:06:50 CEST 2023


On Thu, Jul 20, 2023 at 07:37:27PM +0800, Minda Chen wrote:
> For RISC-V architeture, hardware maintain the dcache coherency.
> Software do not flush the cache. So even cache-line size larger
> than descriptor size, driver can work.
> 
> Signed-off-by: Minda Chen <minda.chen at starfivetech.com>
> ---
>  drivers/net/rtl8169.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>


More information about the U-Boot mailing list