[PATCH v1 2/5] riscv: dts: jh7110: Add PLL clock controller node

[Leo Liang]

On Fri, Jul 07, 2023 at 06:50:08PM +0800, Hal Feng wrote:
> From: Xingyu Wu <xingyu.wu at starfivetech.com>
> 
> Add child node about PLL clock controller in sys_syscon node.
> 
> Signed-off-by: Xingyu Wu <xingyu.wu at starfivetech.com>
> Signed-off-by: Hal Feng <hal.feng at starfivetech.com>
> ---
>  arch/riscv/dts/jh7110.dtsi | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>