[PATCH 1/5] board: rockchip: Add Pine64 Quartz64-A Board
Kever Yang
kever.yang at rock-chips.com
Wed Jul 26 03:48:38 CEST 2023
On 2023/7/23 22:55, Jonas Karlman wrote:
> The Pine64 Quartz64 Model A is a single-board computer based on the
> Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0,
> CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a
> 20 pin GPIO header.
>
> Features tested on a Quartz64-A 8GB v2.0 2021-04-27:
> - SD-card boot
> - eMMC boot
> - PCIe/NVMe/AHCI
> - USB host
>
> Device tree is imported from linux v6.4.
>
> Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas at gmail.com>
> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas at gmail.com>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi | 55 ++
> arch/arm/dts/rk3566-quartz64-a.dts | 839 ++++++++++++++++++
> arch/arm/mach-rockchip/rk3568/Kconfig | 6 +
> board/pine64/quartz64_rk3566/Kconfig | 15 +
> board/pine64/quartz64_rk3566/MAINTAINERS | 9 +
> board/pine64/quartz64_rk3566/Makefile | 3 +
> .../pine64/quartz64_rk3566/quartz64-rk3566.c | 1 +
> configs/quartz64-a-rk3566_defconfig | 110 +++
> doc/board/rockchip/rockchip.rst | 1 +
> include/configs/quartz64_rk3566.h | 10 +
> 11 files changed, 1050 insertions(+)
> create mode 100644 arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3566-quartz64-a.dts
> create mode 100644 board/pine64/quartz64_rk3566/Kconfig
> create mode 100644 board/pine64/quartz64_rk3566/MAINTAINERS
> create mode 100644 board/pine64/quartz64_rk3566/Makefile
> create mode 100644 board/pine64/quartz64_rk3566/quartz64-rk3566.c
> create mode 100644 configs/quartz64-a-rk3566_defconfig
> create mode 100644 include/configs/quartz64_rk3566.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 6764ded580ab..45ef73fdf0ca 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -167,6 +167,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
>
> dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> rk3566-anbernic-rgxx3.dtb \
> + rk3566-quartz64-a.dtb \
> rk3566-radxa-cm3-io.dtb \
> rk3568-evb.dtb \
> rk3568-odroid-m1.dtb \
> diff --git a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> new file mode 100644
> index 000000000000..700c2d3edfe6
> --- /dev/null
> +++ b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> @@ -0,0 +1,55 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include "rk356x-u-boot.dtsi"
> +
> +/ {
> + chosen {
> + stdout-path = &uart2;
> + };
> +};
> +
> +&gpio0 {
> + bootph-all;
> +};
> +
> +&pcie2x1 {
> + pinctrl-0 = <&pcie20m2_pins &pcie_reset_h>;
> +};
> +
> +&sdhci {
> + cap-mmc-highspeed;
> + mmc-ddr-1_8v;
> + pinctrl-names = "default";
> + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
> +};
> +
> +&sfc {
> + bootph-pre-ram;
> + u-boot,spl-sfc-no-dma;
> +
> + flash at 0 {
> + bootph-pre-ram;
> + };
> +};
> +
> +&uart2 {
> + bootph-all;
> + clock-frequency = <24000000>;
> + status = "okay";
> +};
> +
> +/*
> + * U-Boot does not support multiple regulators using the same gpio,
> + * use vcc5v0_usb20_host to fix use of USB 2.0 port
> + */
> +&usb2phy0_otg {
> + phy-supply = <&vcc5v0_usb20_host>;
> +};
> +
> +&vcc3v3_sd {
> + bootph-pre-ram;
> +};
> +
> +&vcc_sd_h {
> + bootph-all;
> +};
> diff --git a/arch/arm/dts/rk3566-quartz64-a.dts b/arch/arm/dts/rk3566-quartz64-a.dts
> new file mode 100644
> index 000000000000..25a8c781f4e7
> --- /dev/null
> +++ b/arch/arm/dts/rk3566-quartz64-a.dts
> @@ -0,0 +1,839 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include "rk3566.dtsi"
> +
> +/ {
> + model = "Pine64 RK3566 Quartz64-A Board";
> + compatible = "pine64,quartz64-a", "rockchip,rk3566";
> +
> + aliases {
> + ethernet0 = &gmac1;
> + mmc0 = &sdmmc0;
> + mmc1 = &sdhci;
> + };
> +
> + chosen: chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + gmac1_clkin: external-gmac1-clock {
> + compatible = "fixed-clock";
> + clock-frequency = <125000000>;
> + clock-output-names = "gmac1_clkin";
> + #clock-cells = <0>;
> + };
> +
> + fan: gpio_fan {
> + compatible = "gpio-fan";
> + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
> + gpio-fan,speed-map = <0 0
> + 4500 1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&fan_en_h>;
> + #cooling-cells = <2>;
> + };
> +
> + hdmi-con {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con_in: endpoint {
> + remote-endpoint = <&hdmi_out_con>;
> + };
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-work {
> + label = "work-led";
> + default-state = "off";
> + gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&work_led_enable_h>;
> + retain-state-suspended;
> + };
> +
> + led-diy {
> + label = "diy-led";
> + default-state = "on";
> + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + pinctrl-names = "default";
> + pinctrl-0 = <&diy_led_enable_h>;
> + retain-state-suspended;
> + };
> + };
> +
> + rk817-sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,name = "Analog RK817";
> + simple-audio-card,mclk-fs = <256>;
> +
> + simple-audio-card,cpu {
> + sound-dai = <&i2s1_8ch>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&rk817>;
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + clocks = <&rk817 1>;
> + clock-names = "ext_clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable_h>;
> + post-power-on-delay-ms = <100>;
> + power-off-delay-us = <5000000>;
> + reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
> + };
> +
> + spdif_dit: spdif-dit {
> + compatible = "linux,spdif-dit";
> + #sound-dai-cells = <0>;
> + };
> +
> + spdif_sound: spdif-sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "SPDIF";
> +
> + simple-audio-card,cpu {
> + sound-dai = <&spdif>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&spdif_dit>;
> + };
> + };
> +
> + vcc12v_dcin: vcc12v_dcin {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc12v_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> + /* vbus feeds the rk817 usb input.
> + * With no battery attached, also feeds vcc_bat+
> + * via ON/OFF_BAT jumper
> + */
> + vbus: vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "vbus";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_enable_h>;
> + regulator-name = "vcc3v3_pcie_p";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_3v3>;
> + };
> +
> + vcc5v0_usb: vcc5v0_usb {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_usb";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + /* all four ports are controlled by one gpio
> + * the host ports are sourced from vcc5v0_usb
> + * the otg port is sourced from vcc5v0_midu
> + */
> + vcc5v0_usb20_host: vcc5v0_usb20_host {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_usb20_host_en>;
> + regulator-name = "vcc5v0_usb20_host";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_usb>;
> + };
> +
> + vcc5v0_usb20_otg: vcc5v0_usb20_otg {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
> + regulator-name = "vcc5v0_usb20_otg";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&dcdc_boost>;
> + };
> +
> + vcc3v3_sd: vcc3v3_sd {
> + compatible = "regulator-fixed";
> + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc_sd_h>;
> + regulator-boot-on;
> + regulator-name = "vcc3v3_sd";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_3v3>;
> + };
> +
> + /* sourced from vbus and vcc_bat+ via rk817 sw5 */
> + vcc_sys: vcc_sys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <4400000>;
> + regulator-max-microvolt = <4400000>;
> + vin-supply = <&vbus>;
> + };
> +
> + /* sourced from vcc_sys, sdio module operates internally at 3.3v */
> + vcc_wl: vcc_wl {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_wl";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_sys>;
> + };
> +};
> +
> +&combphy1 {
> + status = "okay";
> +};
> +
> +&combphy2 {
> + status = "okay";
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu_thermal {
> + trips {
> + cpu_hot: cpu_hot {
> + temperature = <55000>;
> + hysteresis = <2000>;
> + type = "active";
> + };
> + };
> +
> + cooling-maps {
> + map1 {
> + trip = <&cpu_hot>;
> + cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> +};
> +
> +&gmac1 {
> + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
> + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
> + clock_in_out = "input";
> + phy-supply = <&vcc_3v3>;
> + phy-mode = "rgmii";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1m0_miim
> + &gmac1m0_tx_bus2
> + &gmac1m0_rx_bus2
> + &gmac1m0_rgmii_clk
> + &gmac1m0_clkinout
> + &gmac1m0_rgmii_bus>;
> + snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + /* Reset time is 20ms, 100ms for rtl8211f */
> + snps,reset-delays-us = <0 20000 100000>;
> + tx_delay = <0x30>;
> + rx_delay = <0x10>;
> + phy-handle = <&rgmii_phy1>;
> + status = "okay";
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu>;
> + status = "okay";
> +};
> +
> +&hdmi {
> + avdd-0v9-supply = <&vdda_0v9>;
> + avdd-1v8-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&hdmi_in {
> + hdmi_in_vp0: endpoint {
> + remote-endpoint = <&vp0_out_hdmi>;
> + };
> +};
> +
> +&hdmi_out {
> + hdmi_out_con: endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> +};
> +
> +&hdmi_sound {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
> + vdd_cpu: regulator at 1c {
> + compatible = "tcs,tcs4525";
> + reg = <0x1c>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1150000>;
> + regulator-ramp-delay = <2300>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + rk817: pmic at 20 {
> + compatible = "rockchip,rk817";
> + reg = <0x20>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
> + assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
> + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
> + clock-names = "mclk";
> + clocks = <&cru I2S1_MCLKOUT_TX>;
> + clock-output-names = "rk808-clkout1", "rk808-clkout2";
> + #clock-cells = <1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
> + rockchip,system-power-controller;
> + #sound-dai-cells = <0>;
> + wakeup-source;
> +
> + vcc1-supply = <&vcc_sys>;
> + vcc2-supply = <&vcc_sys>;
> + vcc3-supply = <&vcc_sys>;
> + vcc4-supply = <&vcc_sys>;
> + vcc5-supply = <&vcc_sys>;
> + vcc6-supply = <&vcc_sys>;
> + vcc7-supply = <&vcc_sys>;
> + vcc8-supply = <&vcc_sys>;
> + vcc9-supply = <&dcdc_boost>;
> +
> + regulators {
> + vdd_logic: DCDC_REG1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-init-microvolt = <900000>;
> + regulator-ramp-delay = <6001>;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vdd_logic";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vdd_gpu: DCDC_REG2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-init-microvolt = <900000>;
> + regulator-ramp-delay = <6001>;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vdd_gpu";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vcc_ddr";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_3v3: DCDC_REG4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vcc_3v3";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcca1v8_pmu: LDO_REG1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcca1v8_pmu";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdda_0v9: LDO_REG2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-name = "vdda_0v9";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdda0v9_pmu: LDO_REG3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-name = "vdda0v9_pmu";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vccio_acodec: LDO_REG4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vccio_acodec";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vccio_sd: LDO_REG5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vccio_sd";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc3v3_pmu: LDO_REG6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc3v3_pmu";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_1v8: LDO_REG7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc_1v8";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc1v8_dvp: LDO_REG8 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc1v8_dvp";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc2v8_dvp: LDO_REG9 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-name = "vcc2v8_dvp";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + dcdc_boost: BOOST {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-name = "boost";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + otg_switch: OTG_SWITCH {
> + regulator-name = "otg_switch";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +/* i2c3 is exposed on con40
> + * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
> + * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
> + */
> +&i2c3 {
> + status = "okay";
> +};
> +
> +&i2s0_8ch {
> + status = "okay";
> +};
> +
> +&i2s1_8ch {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2s1m0_sclktx
> + &i2s1m0_lrcktx
> + &i2s1m0_sdi0
> + &i2s1m0_sdo0>;
> + rockchip,trcm-sync-tx-only;
> + status = "okay";
> +};
> +
> +&mdio1 {
> + rgmii_phy1: ethernet-phy at 0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + };
> +};
> +
> +&pcie2x1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_reset_h>;
> + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie_p>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + bt {
> + bt_enable_h: bt-enable-h {
> + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_host_wake_l: bt-host-wake-l {
> + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> +
> + bt_wake_l: bt-wake-l {
> + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + fan {
> + fan_en_h: fan-en-h {
> + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + leds {
> + work_led_enable_h: work-led-enable-h {
> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + diy_led_enable_h: diy-led-enable-h {
> + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pcie {
> + pcie_enable_h: pcie-enable-h {
> + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie_reset_h: pcie-reset-h {
> + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int_l: pmic-int-l {
> + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb2 {
> + vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
> + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + sdio-pwrseq {
> + wifi_enable_h: wifi-enable-h {
> + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + vcc_sd {
> + vcc_sd_h: vcc-sd-h {
> + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
> +
> +&pmu_io_domains {
> + pmuio1-supply = <&vcc3v3_pmu>;
> + pmuio2-supply = <&vcc3v3_pmu>;
> + vccio1-supply = <&vccio_acodec>;
> + vccio2-supply = <&vcc_1v8>;
> + vccio3-supply = <&vccio_sd>;
> + vccio4-supply = <&vcc_1v8>;
> + vccio5-supply = <&vcc_3v3>;
> + vccio6-supply = <&vcc1v8_dvp>;
> + vccio7-supply = <&vcc_3v3>;
> + status = "okay";
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + mmc-hs200-1_8v;
> + non-removable;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&sdmmc0 {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc3v3_sd>;
> + vqmmc-supply = <&vccio_sd>;
> + status = "okay";
> +};
> +
> +&sdmmc1 {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + keep-power-in-suspend;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_wl>;
> + vqmmc-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&sfc {
> + pinctrl-0 = <&fspi_pins>;
> + pinctrl-names = "default";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> +
> + flash at 0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <24000000>;
> + spi-rx-bus-width = <4>;
> + spi-tx-bus-width = <1>;
> + };
> +};
> +
> +/* spdif is exposed on con40 pin 18 */
> +&spdif {
> + status = "okay";
> +};
> +
> +/* spi1 is exposed on con40
> + * pin 11 - spi1_mosi_m1
> + * pin 13 - spi1_miso_m1
> + * pin 15 - spi1_clk_m1
> + * pin 17 - spi1_cs0_m1
> + */
> +&spi1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
> +};
> +
> +&tsadc {
> + /* tshut mode 0:CRU 1:GPIO */
> + rockchip,hw-tshut-mode = <1>;
> + /* tshut polarity 0:LOW 1:HIGH */
> + rockchip,hw-tshut-polarity = <0>;
> + status = "okay";
> +};
> +
> +/* uart0 is exposed on con40
> + * pin 12 - uart0_tx
> + * pin 14 - uart0_rx
> + */
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_xfer>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
> + status = "okay";
> + uart-has-rtscts;
> +
> + bluetooth {
> + compatible = "brcm,bcm43438-bt";
> + clocks = <&rk817 1>;
> + clock-names = "lpo";
> + host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
> + device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
> + shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
> + vbat-supply = <&vcc_sys>;
> + vddio-supply = <&vcca1v8_pmu>;
> + max-speed = <3000000>;
> + };
> +};
> +
> +/* uart2 is exposed on con40
> + * pin 8 - uart2_tx_m0_debug
> + * pin 10 - uart2_rx_m0_debug
> + */
> +&uart2 {
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&usb_host1_ehci {
> + status = "okay";
> +};
> +
> +&usb_host1_ohci {
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +/* usb3 controller is muxed with sata1 */
> +&usb_host1_xhci {
> + status = "okay";
> +};
> +
> +&usb2phy0 {
> + status = "okay";
> +};
> +
> +&usb2phy0_host {
> + phy-supply = <&vcc5v0_usb20_host>;
> + status = "okay";
> +};
> +
> +&usb2phy0_otg {
> + phy-supply = <&vcc5v0_usb20_otg>;
> + status = "okay";
> +};
> +
> +&usb2phy1 {
> + status = "okay";
> +};
> +
> +&usb2phy1_host {
> + phy-supply = <&vcc5v0_usb20_host>;
> + status = "okay";
> +};
> +
> +&usb2phy1_otg {
> + phy-supply = <&vcc5v0_usb20_host>;
> + status = "okay";
> +};
> +
> +&vop {
> + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
> + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
> + status = "okay";
> +};
> +
> +&vop_mmu {
> + status = "okay";
> +};
> +
> +&vp0 {
> + vp0_out_hdmi: endpoint at ROCKCHIP_VOP2_EP_HDMI0 {
> + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
> + remote-endpoint = <&hdmi_in_vp0>;
> + };
> +};
> diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig
> index f46be3d081fe..baa51349f4be 100644
> --- a/arch/arm/mach-rockchip/rk3568/Kconfig
> +++ b/arch/arm/mach-rockchip/rk3568/Kconfig
> @@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568
> help
> Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC.
>
> +config TARGET_QUARTZ64_RK3566
> + bool "Pine64 Quartz64"
> + help
> + Pine64 Quartz64 single board computer with a RK3566 SoC.
> +
> endchoice
>
> config ROCKCHIP_BOOT_MODE_REG
> @@ -39,5 +44,6 @@ config SYS_MALLOC_F_LEN
> source "board/rockchip/evb_rk3568/Kconfig"
> source "board/anbernic/rgxx3_rk3566/Kconfig"
> source "board/hardkernel/odroid_m1/Kconfig"
> +source "board/pine64/quartz64_rk3566/Kconfig"
>
> endif
> diff --git a/board/pine64/quartz64_rk3566/Kconfig b/board/pine64/quartz64_rk3566/Kconfig
> new file mode 100644
> index 000000000000..3de1d8f7a993
> --- /dev/null
> +++ b/board/pine64/quartz64_rk3566/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_QUARTZ64_RK3566
> +
> +config SYS_BOARD
> + default "quartz64_rk3566"
> +
> +config SYS_VENDOR
> + default "pine64"
> +
> +config SYS_CONFIG_NAME
> + default "quartz64_rk3566"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> + def_bool y
> +
> +endif
> diff --git a/board/pine64/quartz64_rk3566/MAINTAINERS b/board/pine64/quartz64_rk3566/MAINTAINERS
> new file mode 100644
> index 000000000000..dbc0dfbd9787
> --- /dev/null
> +++ b/board/pine64/quartz64_rk3566/MAINTAINERS
> @@ -0,0 +1,9 @@
> +QUARTZ64-RK3566
> +M: Nicolas Frattaroli <frattaroli.nicolas at gmail.com>
> +R: Jonas Karlman <jonas at kwiboo.se>
> +S: Maintained
> +F: board/pine64/quartz64_rk3566/
> +F: include/configs/quartz64_rk3566.h
> +F: configs/quartz64-a-rk3566_defconfig
> +F: arch/arm/dts/rk3566-quartz64-a.dts
> +F: arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> diff --git a/board/pine64/quartz64_rk3566/Makefile b/board/pine64/quartz64_rk3566/Makefile
> new file mode 100644
> index 000000000000..c24a40e724d7
> --- /dev/null
> +++ b/board/pine64/quartz64_rk3566/Makefile
> @@ -0,0 +1,3 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +
> +obj-y += quartz64-rk3566.o
> diff --git a/board/pine64/quartz64_rk3566/quartz64-rk3566.c b/board/pine64/quartz64_rk3566/quartz64-rk3566.c
> new file mode 100644
> index 000000000000..4c027f2a7af9
> --- /dev/null
> +++ b/board/pine64/quartz64_rk3566/quartz64-rk3566.c
> @@ -0,0 +1 @@
> +// SPDX-License-Identifier: GPL-2.0+
> diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig
> new file mode 100644
> index 000000000000..d55b224feacd
> --- /dev/null
> +++ b/configs/quartz64-a-rk3566_defconfig
> @@ -0,0 +1,110 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00a00000
> +CONFIG_SPL_GPIO=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
> +CONFIG_SF_DEFAULT_SPEED=24000000
> +CONFIG_SF_DEFAULT_MODE=0x2000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-a"
> +CONFIG_ROCKCHIP_RK3568=y
> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_TARGET_QUARTZ64_RK3566=y
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_DEBUG_UART_BASE=0xFE660000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_AHCI=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-quartz64-a.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SPL_MAX_SIZE=0x40000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
> +CONFIG_SPL_ATF=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SPL_REGMAP=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_SCSI_AHCI=y
> +CONFIG_AHCI_PCI=y
> +CONFIG_SPL_CLK=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=4
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_DM_PMIC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_SPL_DM_REGULATOR=y
> +CONFIG_SPL_DM_REGULATOR_FIXED=y
> +CONFIG_REGULATOR_RK8XX=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_SPL_RAM=y
> +CONFIG_SCSI=y
> +CONFIG_DM_SCSI=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SFC=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_ERRNO_STR=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index b89f35954d33..c7d4c835db80 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -96,6 +96,7 @@ List of mainline supported Rockchip boards:
> * rk3568
> - Rockchip Evb-RK3568 (evb-rk3568)
> - Hardkernel ODROID-M1 (odroid-m1-rk3568)
> + - Pine64 Quartz64-A Board (quartz64-a-rk3566_defconfig)
>
> * rk3588
> - Rockchip EVB (evb-rk3588)
> diff --git a/include/configs/quartz64_rk3566.h b/include/configs/quartz64_rk3566.h
> new file mode 100644
> index 000000000000..dfe0fee94cdb
> --- /dev/null
> +++ b/include/configs/quartz64_rk3566.h
> @@ -0,0 +1,10 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +
> +#ifndef __QUARTZ64_RK3566_H
> +#define __QUARTZ64_RK3566_H
> +
> +#define ROCKCHIP_DEVICE_SETTINGS
> +
> +#include <configs/rk3568_common.h>
> +
> +#endif
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