[PATCH 2/5] board: rockchip: Add Pine64 Quartz64-B Board
Kever Yang
kever.yang at rock-chips.com
Wed Jul 26 03:48:50 CEST 2023
On 2023/7/23 22:55, Jonas Karlman wrote:
> The Pine64 Quartz64 Model B is a credit-card sized single-board
> computer based on the Rockchip RK3566 SoC. The board features an M.2
> PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a
> 40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi.
>
> Features tested on a Quartz64-B 4GB v1.4 2022-06-06:
> - SD-card boot
> - eMMC boot
> - SPI Flash boot
> - PCIe/NVMe
> - USB host
>
> Device tree is imported from linux v6.4.
>
> Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas at gmail.com>
> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas at gmail.com>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi | 47 ++
> arch/arm/dts/rk3566-quartz64-b.dts | 739 +++++++++++++++++++++
> board/pine64/quartz64_rk3566/MAINTAINERS | 3 +
> configs/quartz64-b-rk3566_defconfig | 106 +++
> doc/board/rockchip/rockchip.rst | 1 +
> 6 files changed, 897 insertions(+)
> create mode 100644 arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3566-quartz64-b.dts
> create mode 100644 configs/quartz64-b-rk3566_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 45ef73fdf0ca..3cc921e5cc1e 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -168,6 +168,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> rk3566-anbernic-rgxx3.dtb \
> rk3566-quartz64-a.dtb \
> + rk3566-quartz64-b.dtb \
> rk3566-radxa-cm3-io.dtb \
> rk3568-evb.dtb \
> rk3568-odroid-m1.dtb \
> diff --git a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> new file mode 100644
> index 000000000000..bdbb921c66e2
> --- /dev/null
> +++ b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> @@ -0,0 +1,47 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include "rk356x-u-boot.dtsi"
> +
> +/ {
> + chosen {
> + stdout-path = &uart2;
> + };
> +};
> +
> +&pcie2x1 {
> + pinctrl-0 = <&pcie20m2_pins &pcie_reset_h>;
> +};
> +
> +&sdhci {
> + cap-mmc-highspeed;
> + mmc-ddr-1_8v;
> + pinctrl-names = "default";
> + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
> +};
> +
> +&sfc {
> + bootph-pre-ram;
> + u-boot,spl-sfc-no-dma;
> +
> + flash at 0 {
> + bootph-pre-ram;
> + };
> +};
> +
> +&uart2 {
> + bootph-all;
> + clock-frequency = <24000000>;
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + dr_mode = "host";
> +};
> +
> +&vcc5v0_usb30_host {
> + /delete-property/ regulator-always-on;
> +};
> +
> +&vcc5v0_usb_otg {
> + /delete-property/ regulator-always-on;
> +};
> diff --git a/arch/arm/dts/rk3566-quartz64-b.dts b/arch/arm/dts/rk3566-quartz64-b.dts
> new file mode 100644
> index 000000000000..b276eb0810c7
> --- /dev/null
> +++ b/arch/arm/dts/rk3566-quartz64-b.dts
> @@ -0,0 +1,739 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include "rk3566.dtsi"
> +
> +/ {
> + model = "Pine64 RK3566 Quartz64-B Board";
> + compatible = "pine64,quartz64-b", "rockchip,rk3566";
> +
> + aliases {
> + ethernet0 = &gmac1;
> + mmc0 = &sdmmc0;
> + mmc1 = &sdhci;
> + mmc2 = &sdmmc1;
> + };
> +
> + chosen: chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + gmac1_clkin: external-gmac1-clock {
> + compatible = "fixed-clock";
> + clock-frequency = <125000000>;
> + clock-output-names = "gmac1_clkin";
> + #clock-cells = <0>;
> + };
> +
> + hdmi-con {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con_in: endpoint {
> + remote-endpoint = <&hdmi_out_con>;
> + };
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-user {
> + label = "user-led";
> + default-state = "on";
> + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + pinctrl-names = "default";
> + pinctrl-0 = <&user_led_enable_h>;
> + retain-state-suspended;
> + };
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,name = "Analog RK809";
> + simple-audio-card,mclk-fs = <256>;
> +
> + simple-audio-card,cpu {
> + sound-dai = <&i2s1_8ch>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&rk809>;
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + status = "okay";
> + compatible = "mmc-pwrseq-simple";
> + clocks = <&rk809 1>;
> + clock-names = "ext_clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable_h>;
> + reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
> + post-power-on-delay-ms = <100>;
> + power-off-delay-us = <5000000>;
> + };
> +
> + vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_enable_h>;
> + regulator-name = "vcc3v3_pcie_p";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_3v3>;
> + };
> +
> + vcc5v0_in: vcc5v0-in-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_in";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + vcc5v0_sys: vcc5v0-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_in>;
> + };
> +
> + vcc3v3_sys: vcc3v3-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_sys";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_usb30_host";
> + enable-active-high;
> + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
> + regulator-always-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_usb_otg";
> + enable-active-high;
> + gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
> + regulator-always-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&combphy1 {
> + status = "okay";
> +};
> +
> +&combphy2 {
> + status = "okay";
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&gmac1 {
> + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
> + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
> + clock_in_out = "input";
> + phy-mode = "rgmii";
> + phy-supply = <&vcc_3v3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1m1_miim
> + &gmac1m1_tx_bus2
> + &gmac1m1_rx_bus2
> + &gmac1m1_rgmii_clk
> + &gmac1m1_clkinout
> + &gmac1m1_rgmii_bus>;
> + snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
> + snps,reset-delays-us = <0 20000 100000>;
> + tx_delay = <0x4f>;
> + rx_delay = <0x24>;
> + phy-handle = <&rgmii_phy1>;
> + status = "okay";
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu>;
> + status = "okay";
> +};
> +
> +&hdmi {
> + avdd-0v9-supply = <&vdda0v9_image>;
> + avdd-1v8-supply = <&vcca1v8_image>;
> + status = "okay";
> +};
> +
> +&hdmi_in {
> + hdmi_in_vp0: endpoint {
> + remote-endpoint = <&vp0_out_hdmi>;
> + };
> +};
> +
> +&hdmi_out {
> + hdmi_out_con: endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> +};
> +
> +&hdmi_sound {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
> + vdd_cpu: regulator at 1c {
> + compatible = "tcs,tcs4525";
> + reg = <0x1c>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1150000>;
> + regulator-ramp-delay = <2300>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + rk809: pmic at 20 {
> + compatible = "rockchip,rk809";
> + reg = <0x20>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
> + assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
> + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
> + clock-names = "mclk";
> + clocks = <&cru I2S1_MCLKOUT_TX>;
> + clock-output-names = "rk808-clkout1", "rk808-clkout2";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
> + rockchip,system-power-controller;
> + #sound-dai-cells = <0>;
> + wakeup-source;
> + #clock-cells = <1>;
> +
> + vcc1-supply = <&vcc3v3_sys>;
> + vcc2-supply = <&vcc3v3_sys>;
> + vcc3-supply = <&vcc3v3_sys>;
> + vcc4-supply = <&vcc3v3_sys>;
> + vcc5-supply = <&vcc3v3_sys>;
> + vcc6-supply = <&vcc3v3_sys>;
> + vcc7-supply = <&vcc3v3_sys>;
> + vcc8-supply = <&vcc3v3_sys>;
> + vcc9-supply = <&vcc3v3_sys>;
> +
> + regulators {
> + vdd_log: DCDC_REG1 {
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-init-microvolt = <900000>;
> + regulator-ramp-delay = <6001>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vdd_gpu: DCDC_REG2 {
> + regulator-name = "vdd_gpu";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-init-microvolt = <900000>;
> + regulator-ramp-delay = <6001>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-initial-mode = <0x2>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vdd_npu: DCDC_REG4 {
> + regulator-name = "vdd_npu";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-initial-mode = <0x2>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8: DCDC_REG5 {
> + regulator-name = "vcc_1v8";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdda0v9_image: LDO_REG1 {
> + regulator-name = "vdda0v9_image";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vdda_0v9: LDO_REG2 {
> + regulator-name = "vdda_0v9";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vdda0v9_pmu: LDO_REG3 {
> + regulator-name = "vdda0v9_pmu";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vccio_acodec: LDO_REG4 {
> + regulator-name = "vccio_acodec";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> +
> + };
> + };
> +
> + vccio_sd: LDO_REG5 {
> + regulator-name = "vccio_sd";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc3v3_pmu: LDO_REG6 {
> + regulator-name = "vcc3v3_pmu";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcca_1v8: LDO_REG7 {
> + regulator-name = "vcca_1v8";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcca1v8_pmu: LDO_REG8 {
> + regulator-name = "vcca1v8_pmu";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcca1v8_image: LDO_REG9 {
> + regulator-name = "vcca1v8_image";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc_3v3: SWITCH_REG1 {
> + regulator-boot-on;
> + regulator-name = "vcc_3v3";
> + };
> +
> + vcc3v3_sd: SWITCH_REG2 {
> + regulator-name = "vcc3v3_sd";
> + };
> + };
> + };
> +};
> +
> +/* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2m1_xfer>;
> + status = "okay";
> +};
> +
> +/* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c3m1_xfer>;
> + status = "okay";
> +};
> +
> +/*
> + * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3
> + * pin 27 - i2c4_sda_m0
> + * pin 28 - i2c4_scl_m0
> + */
> +&i2c4 {
> + status = "okay";
> +};
> +
> +/*
> + * i2c5_m0 is exposed on PI40
> + * pin 29 - i2c5_scl_m0
> + * pin 31 - i2c5_sda_m0
> + */
> +&i2c5 {
> + status = "disabled";
> +};
> +
> +&i2s0_8ch {
> + status = "okay";
> +};
> +
> +&i2s1_8ch {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2s1m0_sclktx
> + &i2s1m0_lrcktx
> + &i2s1m0_sdi0
> + &i2s1m0_sdo0>;
> + rockchip,trcm-sync-tx-only;
> + status = "okay";
> +};
> +
> +&mdio1 {
> + rgmii_phy1: ethernet-phy at 1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x1>;
> + };
> +};
> +
> +&pcie2x1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_reset_h>;
> + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie_p>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + bt {
> + bt_enable_h: bt-enable-h {
> + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_host_wake_l: bt-host-wake-l {
> + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> +
> + bt_wake_l: bt-wake-l {
> + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + leds {
> + user_led_enable_h: user-led-enable-h {
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pcie {
> + pcie_enable_h: pcie-enable-h {
> + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie_reset_h: pcie-reset-h {
> + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int: pmic_int {
> + rockchip,pins =
> + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sdio-pwrseq {
> + wifi_enable_h: wifi-enable-h {
> + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + usb {
> + vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
> + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
> + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
> +
> +&pmu_io_domains {
> + status = "okay";
> + pmuio1-supply = <&vcc3v3_pmu>;
> + pmuio2-supply = <&vcca1v8_pmu>;
> + vccio1-supply = <&vccio_acodec>;
> + vccio2-supply = <&vcc_1v8>;
> + vccio3-supply = <&vccio_sd>;
> + vccio4-supply = <&vcca1v8_pmu>;
> + vccio5-supply = <&vcc_3v3>;
> + vccio6-supply = <&vcc_3v3>;
> + vccio7-supply = <&vcc_3v3>;
> +};
> +
> +&saradc {
> + vref-supply = <&vcca_1v8>;
> + status = "okay";
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + mmc-hs200-1_8v;
> + non-removable;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&sdmmc0 {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
> + sd-uhs-sdr50;
> + vmmc-supply = <&vcc3v3_sd>;
> + vqmmc-supply = <&vccio_sd>;
> + status = "okay";
> +};
> +
> +&sdmmc1 {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + keep-power-in-suspend;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
> + vmmc-supply = <&vcc3v3_sys>;
> + vqmmc-supply = <&vcca1v8_pmu>;
> + status = "okay";
> +};
> +
> +&sfc {
> + pinctrl-0 = <&fspi_pins>;
> + pinctrl-names = "default";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash at 0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <24000000>;
> + spi-rx-bus-width = <4>;
> + spi-tx-bus-width = <1>;
> + };
> +};
> +
> +&tsadc {
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
> + status = "okay";
> + uart-has-rtscts;
> +
> + bluetooth {
> + compatible = "brcm,bcm4345c5";
> + clocks = <&rk809 1>;
> + clock-names = "lpo";
> + device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
> + host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
> + shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
> + vbat-supply = <&vcc3v3_sys>;
> + vddio-supply = <&vcca1v8_pmu>;
> + };
> +};
> +
> +/*
> + * uart2_m0 is exposed on PI40
> + * pin 8 - uart2_tx_m0
> + * pin 10 - uart2_rx_m0
> + */
> +&uart2 {
> + status = "okay";
> +};
> +
> +&usb2phy0_host {
> + phy-supply = <&vcc5v0_usb30_host>;
> + status = "okay";
> +};
> +
> +&usb2phy0_otg {
> + phy-supply = <&vcc5v0_usb_otg>;
> + status = "okay";
> +};
> +
> +&usb2phy1_otg {
> + phy-supply = <&vcc5v0_usb30_host>;
> + status = "okay";
> +};
> +
> +&usb2phy0 {
> + status = "okay";
> +};
> +
> +&usb2phy1 {
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + status = "okay";
> +};
> +
> +&usb_host1_xhci {
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&vop {
> + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
> + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
> + status = "okay";
> +};
> +
> +&vop_mmu {
> + status = "okay";
> +};
> +
> +&vp0 {
> + vp0_out_hdmi: endpoint at ROCKCHIP_VOP2_EP_HDMI0 {
> + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
> + remote-endpoint = <&hdmi_in_vp0>;
> + };
> +};
> diff --git a/board/pine64/quartz64_rk3566/MAINTAINERS b/board/pine64/quartz64_rk3566/MAINTAINERS
> index dbc0dfbd9787..2e637bf51ba3 100644
> --- a/board/pine64/quartz64_rk3566/MAINTAINERS
> +++ b/board/pine64/quartz64_rk3566/MAINTAINERS
> @@ -5,5 +5,8 @@ S: Maintained
> F: board/pine64/quartz64_rk3566/
> F: include/configs/quartz64_rk3566.h
> F: configs/quartz64-a-rk3566_defconfig
> +F: configs/quartz64-b-rk3566_defconfig
> F: arch/arm/dts/rk3566-quartz64-a.dts
> F: arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> +F: arch/arm/dts/rk3566-quartz64-b.dts
> +F: arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig
> new file mode 100644
> index 000000000000..b98c81f9dcef
> --- /dev/null
> +++ b/configs/quartz64-b-rk3566_defconfig
> @@ -0,0 +1,106 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00a00000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
> +CONFIG_SF_DEFAULT_SPEED=24000000
> +CONFIG_SF_DEFAULT_MODE=0x2000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-b"
> +CONFIG_ROCKCHIP_RK3568=y
> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_TARGET_QUARTZ64_RK3566=y
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_DEBUG_UART_BASE=0xFE660000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_AHCI=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-quartz64-b.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SPL_MAX_SIZE=0x40000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
> +CONFIG_SPL_ATF=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SPL_REGMAP=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_SCSI_AHCI=y
> +CONFIG_AHCI_PCI=y
> +CONFIG_SPL_CLK=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=4
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_DM_PMIC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_REGULATOR_RK8XX=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_SPL_RAM=y
> +CONFIG_SCSI=y
> +CONFIG_DM_SCSI=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SFC=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_ERRNO_STR=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index c7d4c835db80..1c0e10c40607 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -97,6 +97,7 @@ List of mainline supported Rockchip boards:
> - Rockchip Evb-RK3568 (evb-rk3568)
> - Hardkernel ODROID-M1 (odroid-m1-rk3568)
> - Pine64 Quartz64-A Board (quartz64-a-rk3566_defconfig)
> + - Pine64 Quartz64-B Board (quartz64-b-rk3566_defconfig)
>
> * rk3588
> - Rockchip EVB (evb-rk3588)
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