[PATCH 5/5] board: rockchip: Add Edgeble Neural Compute Module 6B
Kever Yang
kever.yang at rock-chips.com
Wed Jul 26 09:42:23 CEST 2023
On 2023/6/11 14:57, Jagan Teki wrote:
> Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
> based on Rockchip RK3588J from Edgeble AI.
>
> Add support for this SoM and IO board.
>
> Signed-off-by: Jagan Teki <jagan at edgeble.ai>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> .../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 22 +++++++
> arch/arm/mach-rockchip/rk3588/Kconfig | 10 +++
> .../neural-compute-module-6/MAINTAINERS | 1 +
> configs/neu6b-io-rk3588_defconfig | 64 +++++++++++++++++++
> doc/board/rockchip/rockchip.rst | 1 +
> 5 files changed, 98 insertions(+)
> create mode 100644 arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> create mode 100644 configs/neu6b-io-rk3588_defconfig
>
> diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> new file mode 100644
> index 0000000000..cd7626b24b
> --- /dev/null
> +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
> + */
> +
> +#include "rk3588j-u-boot.dtsi"
> +
> +/ {
> + aliases {
> + mmc0 = &sdmmc;
> + };
> +
> + chosen {
> + stdout-path = &uart2;
> + u-boot,spl-boot-order = &sdmmc;
> + };
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
> index 5eecd26f86..82fe142264 100644
> --- a/arch/arm/mach-rockchip/rk3588/Kconfig
> +++ b/arch/arm/mach-rockchip/rk3588/Kconfig
> @@ -19,6 +19,16 @@ config TARGET_RK3588_NEU6
> IO board and Neu6a needs to mount on top of this IO board in order to
> create complete Edgeble Neural Compute Module 6A(Neu6A) IO platform.
>
> + Neu6B:
> + Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
> + based on Rockchip RK3588J from Edgeble AI.
> +
> + Neu6A-IO:
> + Neural Compute Module 6B(Neu6B) IO board is an industrial form factor
> + IO board and Neu6a needs to mount on top of this IO board in order to
> + create complete Edgeble Neural Compute Module 6B(Neu6B) IO platform.
> +
> +config TARGET_ROCK5B_RK3588
> config TARGET_ROCK5B_RK3588
> bool "Radxa ROCK5B RK3588 board"
> select BOARD_LATE_INIT
> diff --git a/board/edgeble/neural-compute-module-6/MAINTAINERS b/board/edgeble/neural-compute-module-6/MAINTAINERS
> index 249df957f1..bc7f9b0e68 100644
> --- a/board/edgeble/neural-compute-module-6/MAINTAINERS
> +++ b/board/edgeble/neural-compute-module-6/MAINTAINERS
> @@ -4,3 +4,4 @@ S: Maintained
> F: board/edgeble/neural-compute-module-6
> F: include/configs/neural-compute-module-6.h
> F: configs/neu6a-io-rk3588_defconfig
> +F: configs/neu6b-io-rk3588_defconfig
> diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig
> new file mode 100644
> index 0000000000..c7bc3b1965
> --- /dev/null
> +++ b/configs/neu6b-io-rk3588_defconfig
> @@ -0,0 +1,64 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00a00000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6b-io"
> +CONFIG_ROCKCHIP_RK3588=y
> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_TARGET_RK3588_NEU6=y
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_DEBUG_UART_BASE=0xFEB50000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_DEBUG_UART=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6b-io.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SPL_MAX_SIZE=0x20000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_ATF=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_MMC=y
> +# CONFIG_CMD_SETEXPR is not set
> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_REGMAP=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_SPL_CLK=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_REGULATOR_PWM=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_SPL_RAM=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYSRESET=y
> +CONFIG_ERRNO_STR=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 1f46924a3d..32df1497c5 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -99,6 +99,7 @@ List of mainline supported Rockchip boards:
> * rk3588
> - Rockchip EVB (evb-rk3588)
> - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588)
> + - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
> - Radxa ROCK 5B (rock5b-rk3588)
>
> * rv1108
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