[PATCH 4/7] rockchip: veyron: Add serial, logging, silent console support

[Kever Yang]

On 2023/7/8 03:16, Alper Nebi Yasak wrote:
> Commit eba768c54587 ("rockchip: jerry: Add serial support") enables
> ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work
> correctly. Enable it also for other veyron boards.
>
> Also enable logging and disable scrolling multiple lines at once as in
> chromebook_jerry, and enable silent console as chromebook_minnie does.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak at gmail.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>
>   configs/chromebit_mickey_defconfig  | 3 +++
>   configs/chromebook_minnie_defconfig | 3 ++-
>   configs/chromebook_speedy_defconfig | 1 +
>   3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
> index a7c6213a9892..f45b14b9d3d1 100644
> --- a/configs/chromebit_mickey_defconfig
> +++ b/configs/chromebit_mickey_defconfig
> @@ -26,6 +26,8 @@ CONFIG_SPL_PAYLOAD="u-boot.img"
>   CONFIG_DEBUG_UART=y
>   CONFIG_USE_PREBOOT=y
>   CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
> +CONFIG_SILENT_CONSOLE=y
> +CONFIG_LOG=y
>   # CONFIG_DISPLAY_CPUINFO is not set
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_BOARD_EARLY_INIT_R=y
> @@ -96,6 +98,7 @@ CONFIG_RAM=y
>   CONFIG_SPL_RAM=y
>   CONFIG_DEBUG_UART_SHIFT=2
>   CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SERIAL=y
>   CONFIG_ROCKCHIP_SPI=y
>   CONFIG_SYSRESET=y
>   CONFIG_USB=y
> diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
> index 8a4e1858c8bd..01964d13754e 100644
> --- a/configs/chromebook_minnie_defconfig
> +++ b/configs/chromebook_minnie_defconfig
> @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y
>   CONFIG_USE_PREBOOT=y
>   CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
>   CONFIG_SILENT_CONSOLE=y
> +CONFIG_LOG=y
>   # CONFIG_DISPLAY_CPUINFO is not set
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_BOARD_EARLY_INIT_R=y
> @@ -98,6 +99,7 @@ CONFIG_RAM=y
>   CONFIG_SPL_RAM=y
>   CONFIG_DEBUG_UART_SHIFT=2
>   CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SERIAL=y
>   CONFIG_SOUND=y
>   CONFIG_I2S=y
>   CONFIG_I2S_ROCKCHIP=y
> @@ -114,7 +116,6 @@ CONFIG_DISPLAY=y
>   CONFIG_VIDEO_ROCKCHIP=y
>   CONFIG_DISPLAY_ROCKCHIP_EDP=y
>   CONFIG_DISPLAY_ROCKCHIP_HDMI=y
> -CONFIG_CONSOLE_SCROLL_LINES=10
>   CONFIG_SPL_TINY_MEMSET=y
>   CONFIG_CMD_DHRYSTONE=y
>   CONFIG_ERRNO_STR=y
> diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
> index 45c22f5b103a..f8f2a280f6cf 100644
> --- a/configs/chromebook_speedy_defconfig
> +++ b/configs/chromebook_speedy_defconfig
> @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y
>   CONFIG_USE_PREBOOT=y
>   CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
>   CONFIG_SILENT_CONSOLE=y
> +CONFIG_LOG=y
>   # CONFIG_DISPLAY_CPUINFO is not set
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_BOARD_EARLY_INIT_R=y