[PATCH v3] rockchip: rk3568: Add EmbedFire Lubancat 2 support

Andy Yan andyshrk at 163.com
Mon Jul 31 03:11:17 CEST 2023




Hi Jonas:
  Thanks for you kindly review。












At 2023-07-30 21:22:36, "Jonas Karlman" <jonas at kwiboo.se> wrote:
>Hi Andy,
>
>On 2023-07-29 13:58, Andy Yan wrote:
>> LubanCat2 is a rk3568 based SBC from EmbedFire.
>> 
>> Specification:
>> - Rockchip rk3568
>> - LPDDR4/4X 1/2/4/8 GB
>> - TF scard slot
>> - eMMC 8/32/64/128 GB
>> - Gigabit ethernet x 2
>> - HDMI out
>> - USB 2.0 Host x 1
>> - USB 2.0 Type-C OTG x 1
>> - USB 3.0 Host x 1
>> - Mini PCIE interface for WIFI/BT module
>> - M.2 key for 2280 NVME
>> - 40 pin header
>> 
>> The dts file is sync from linux mainline.
>> 
>> There are some dts bootph-all and USB3 update according to Jonas suggestion[0],
>> so this patch based on Jonas patch [1] [2].
>> 
>> Signed-off-by: Andy Yan <andyshrk at 163.com>
>> [0]:http://patchwork.ozlabs.org/project/uboot/patch/20230708102556.25472-1-andyshrk@163.com/
>> [1]:http://patchwork.ozlabs.org/project/uboot/cover/20230728115302.1735429-1-jonas@kwiboo.se/
>> [2]:http://patchwork.ozlabs.org/project/uboot/cover/20230728124011.1747408-1-jonas@kwiboo.se/
>> 
>> ---
>> 
>> Changes in v3:
>> - some alphabetical order update
>> - disable all SPI flash related options.
>> - remove bootph-all for pinctrl
>> - add emmc_datastrobe pinconfig for hs200/hs400 in u-boot.dtsi
>> - use USB_DWC3_GENERIC driver as Jonas suggested.
>> - add CONFIG_SPL_DM_SEQ_ALIAS
>> 
>> Changes in v2:
>> - enable SPL_FIT_SIGNATURE
>> 
>>  arch/arm/dts/Makefile                      |   1 +
>>  arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi |  28 +
>>  arch/arm/dts/rk3568-lubancat-2.dts         | 734 +++++++++++++++++++++
>>  configs/lubancat-2-rk3568_defconfig        |  87 +++
>>  4 files changed, 850 insertions(+)
>>  create mode 100644 arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
>>  create mode 100644 arch/arm/dts/rk3568-lubancat-2.dts
>>  create mode 100644 configs/lubancat-2-rk3568_defconfig
>
>You should add an entry for this board to evb_rk3568/MAINTAINERS and
>also to the documentation at doc/board/rockchip/rockchip.rst
>
>[...]
>
>> diff --git a/arch/arm/dts/rk3568-lubancat-2.dts b/arch/arm/dts/rk3568-lubancat-2.dts
>> new file mode 100644
>> index 0000000000..da257b0591
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3568-lubancat-2.dts
>> @@ -0,0 +1,734 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +
>> +/*
>> + * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
>> + * Copyright (c) 2023 EmbedFire <embedfire at embedfire.com>
>> + * Copyright (c) 2023 Andy Yan <andyshrk at 163.com>
>
>You are changing copyright header on a file otherwise copied 1:1 from
>the linux kernel.
>
>> + */
>> +
>
>[...]
>
>> diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig
>> new file mode 100644
>> index 0000000000..278ee8dc70
>> --- /dev/null
>> +++ b/configs/lubancat-2-rk3568_defconfig
>> @@ -0,0 +1,87 @@
>> +CONFIG_ARM=y
>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>> +CONFIG_COUNTER_FREQUENCY=24000000
>> +CONFIG_ARCH_ROCKCHIP=y
>> +CONFIG_TEXT_BASE=0x00a00000
>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>> +CONFIG_NR_DRAM_BANKS=2
>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>> +CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2"
>> +CONFIG_ROCKCHIP_RK3568=y
>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>> +CONFIG_SPL_SERIAL=y
>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>> +CONFIG_SPL_STACK=0x400000
>> +CONFIG_DEBUG_UART_BASE=0xFE660000
>> +CONFIG_DEBUG_UART_CLOCK=24000000
>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_FIT=y
>> +CONFIG_FIT_VERBOSE=y
>> +CONFIG_SPL_FIT_SIGNATURE=y
>> +CONFIG_SPL_LOAD_FIT=y
>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-lubancat-2.dtb"
>> +# CONFIG_DISPLAY_CPUINFO is not set
>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>> +CONFIG_SPL_MAX_SIZE=0x40000
>> +CONFIG_SPL_PAD_TO=0x7f8000
>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>> +CONFIG_SPL_STACK_R=y
>> +CONFIG_SPL_ATF=y
>> +CONFIG_CMD_GPIO=y
>> +CONFIG_CMD_GPT=y
>> +CONFIG_CMD_I2C=y
>> +CONFIG_CMD_MMC=y
>> +CONFIG_CMD_USB=y
>> +# CONFIG_CMD_SETEXPR is not set
>> +CONFIG_CMD_PMIC=y
>> +CONFIG_CMD_REGULATOR=y
>> +# CONFIG_SPL_DOS_PARTITION is not set
>> +CONFIG_SPL_OF_CONTROL=y
>> +CONFIG_OF_LIVE=y
>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>> +CONFIG_SPL_REGMAP=y
>> +CONFIG_SPL_SYSCON=y
>> +CONFIG_SPL_CLK=y
>> +CONFIG_ROCKCHIP_GPIO=y
>> +CONFIG_SYS_I2C_ROCKCHIP=y
>> +CONFIG_MISC=y
>> +CONFIG_SUPPORT_EMMC_RPMB=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_ROCKCHIP=y
>> +CONFIG_MMC_SDHCI=y
>> +CONFIG_MMC_SDHCI_SDMA=y
>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>> +# CONFIG_SPI_FLASH is not set
>> +CONFIG_ETH_DESIGNWARE=y
>> +CONFIG_GMAC_ROCKCHIP=y
>
>You can drop CONFIG_ETH_DESIGNWARE=y and CONFIG_ETH_DESIGNWARE=y here.
Do you mean I should drop CONFIG_ETH_DESIGNWARE=y and  CONFIG_GMAC_ROCKCHIP=y as the current u-boot driver does not support it?
I have not test this function,just see some other boards(nanopi-r5c/rock-3a) enabled this。

>
>These drivers do not support rk3568 and ethernet support should end up
>in a driver that depend on the dwc_eth_qos driver.
>


>Regards,
>Jonas
>
>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>> +CONFIG_SPL_PINCTRL=y
>> +CONFIG_DM_PMIC=y
>> +CONFIG_PMIC_RK8XX=y
>> +CONFIG_REGULATOR_RK8XX=y
>> +CONFIG_PWM_ROCKCHIP=y
>> +CONFIG_SPL_RAM=y
>> +CONFIG_BAUDRATE=1500000
>> +CONFIG_DEBUG_UART_SHIFT=2
>> +CONFIG_SYS_NS16550_MEM32=y
>> +CONFIG_SYSRESET=y
>> +CONFIG_USB=y
>> +CONFIG_USB_XHCI_HCD=y
>> +CONFIG_USB_EHCI_HCD=y
>> +CONFIG_USB_EHCI_GENERIC=y
>> +CONFIG_USB_OHCI_HCD=y
>> +CONFIG_USB_OHCI_GENERIC=y
>> +CONFIG_USB_DWC3=y
>> +CONFIG_USB_DWC3_GENERIC=y
>> +CONFIG_ERRNO_STR=y
>> +CONFIG_EFI_VAR_BUF_SIZE=16384


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