[PATCH v2 4/5] rockchip: rk3399-roc-pc: Fix SPL max size and SPI flash payload offset

[Kever Yang]

On 2023/7/28 19:38, Jonas Karlman wrote:
> TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
> loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
> reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
> TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
>
> Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
> for a payload of 3168 KB before env offset start to overlap.
>
> Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
> image, u-boot-rockchip-spi.bin.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
> Reviewed-by: Quentin Schulz <foss+u-boot at 0leil.net>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v2:
> - Rebase on u-boot-rockchip/master
> - Collect r-b tags
>
>   arch/arm/dts/rk3399-roc-pc-u-boot.dtsi    | 4 ----
>   configs/roc-pc-mezzanine-rk3399_defconfig | 4 +++-
>   configs/roc-pc-rk3399_defconfig           | 4 +++-
>   3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> index f85e7b62d9ad..c8f4418a7389 100644
> --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> @@ -11,10 +11,6 @@
>   		u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc;
>   	};
>   
> -	config {
> -		u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
> -	};
> -
>   	vcc_hub_en: vcc_hub_en-regulator {
>   		compatible = "regulator-fixed";
>   		enable-active-high;
> diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
> index 0d113c764f61..06d97c3e1a2d 100644
> --- a/configs/roc-pc-mezzanine-rk3399_defconfig
> +++ b/configs/roc-pc-mezzanine-rk3399_defconfig
> @@ -13,6 +13,7 @@ CONFIG_ENV_SECT_SIZE=0x1000
>   CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine"
>   CONFIG_DM_RESET=y
>   CONFIG_ROCKCHIP_RK3399=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>   CONFIG_TARGET_ROC_PC_RK3399=y
>   CONFIG_SPL_STACK=0x400000
>   CONFIG_DEBUG_UART_BASE=0xFF1A0000
> @@ -26,7 +27,7 @@ CONFIG_DEBUG_UART=y
>   CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_MISC_INIT_R=y
> -CONFIG_SPL_MAX_SIZE=0x2e000
> +CONFIG_SPL_MAX_SIZE=0x40000
>   CONFIG_SPL_PAD_TO=0x7f8000
>   CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>   CONFIG_SPL_BSS_START_ADDR=0x400000
> @@ -37,6 +38,7 @@ CONFIG_SPL_STACK_R=y
>   CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000
>   CONFIG_SPL_ENV_SUPPORT=y
>   CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
>   CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>   CONFIG_TPL=y
>   CONFIG_CMD_BOOTZ=y
> diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
> index 7e5db7419517..c53e8622431e 100644
> --- a/configs/roc-pc-rk3399_defconfig
> +++ b/configs/roc-pc-rk3399_defconfig
> @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000
>   CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
>   CONFIG_DM_RESET=y
>   CONFIG_ROCKCHIP_RK3399=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>   CONFIG_TARGET_ROC_PC_RK3399=y
>   CONFIG_SPL_STACK=0x400000
>   CONFIG_DEBUG_UART_BASE=0xFF1A0000
> @@ -27,7 +28,7 @@ CONFIG_USE_PREBOOT=y
>   CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_MISC_INIT_R=y
> -CONFIG_SPL_MAX_SIZE=0x2e000
> +CONFIG_SPL_MAX_SIZE=0x40000
>   CONFIG_SPL_PAD_TO=0x7f8000
>   CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>   CONFIG_SPL_BSS_START_ADDR=0x400000
> @@ -38,6 +39,7 @@ CONFIG_SPL_STACK_R=y
>   CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000
>   CONFIG_SPL_ENV_SUPPORT=y
>   CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
>   CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>   CONFIG_TPL=y
>   CONFIG_CMD_BOOTZ=y