[PATCH v6 0/2] arm: dts: rockchip: rk3399: usb: ehci: Fix EHCI probe in rk3399 to access peripherals by USB 2.
Xavier Drudis Ferran
xdrudis at tinet.cat
Sun Jun 4 10:12:35 CEST 2023
EHCI probing in Rock pi 4 currently fails.
Add a clock driver for usb2phy so that probing EHCI does not fail when
missing one of the clocks in the bundle for usb_host0_ehci, since
usb2phy is UCLASS_PHY but not UCLASS_CLK.
Xavier Drudis Ferran (2):
arm: dts: rockchip: rk3399: usb: ehci: Fix EHCI probe in rk3399 to
access peripherals by USB 2.
arm: rk3399: usb2phy: phy-rockchip-inno-usb2.c: Implement operations
for the 480MHz usb2phy clock in rk3399.
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 97 ++++++++++++++++++-
1 file changed, 96 insertions(+), 1 deletion(-)
Cc: Simon Glass <sjg at chromium.org>
Cc: Philipp Tomsich <philipp.tomsich at vrull.eu>
Cc: Kever Yang <kever.yang at rock-chips.com>
Cc: Lukasz Majewski <lukma at denx.de>
Cc: Sean Anderson <seanga2 at gmail.com>
Cc: Marek Vasut <marex at denx.de>
Cc: Christoph Fritz <chf.fritz at googlemail.com>
Cc: Jagan Teki <jagan at amarulasolutions.com>
Signed-off-by: Xavier Drudis Ferran <xdrudis at tinet.cat>
---
Changes:
v6: just retested over current next branch and some corrections
to message and headers
(no changes to code).
v5: fixes a bug that Christoph Fritz discovered, consisting in the
wrong eror code returned when enabling or disabling the clock
because property_enable() returns an error code in linux but
the modified register value in U-Boot. This caused the clk
disable to abort before freeing the clock.
v4: move v3 to one patch in the series and add a second patch
to add operations to enable disable the usb2phy 480Mhz clock.
Also, honour clock-output-names for what is worth.
v3: implement option 5 (bind usb2phy as a clk driver too) instead
of option 1 (ehci-generic.c tolerates missing clocks).
v2: implement option 1 (ehci-generic.c tolerates missing clocks)
instead of option 3 (change dts node to remove the missing
clock).
--
2.20.1
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