[PATCH v6 2/2] arm: rk3399: usb2phy: phy-rockchip-inno-usb2.c: Implement operations for the 480MHz usb2phy clock in rk3399.
Marek Vasut
marex at denx.de
Sun Jun 4 11:33:21 CEST 2023
On 6/4/23 10:13, Xavier Drudis Ferran wrote:
>
> This clock doesn't seem needed but appears in a phandle list used by
> ehci-generic.c to bulk enable it. The phandle list comes from linux,
> where it is needed for suspend/resume to work [1].
>
> My tests give the same results with or without this patch, but Marek
> Vasut found it weird to declare an empty clk_ops [2].
>
> So I adapted the code from linux 6.1-rc8 so that it hopefully works
> if it ever has some user. For now, without real use, it seems to
> at least not give any errors when called.
>
> Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/
> [2] https://patchwork.ozlabs.org/project/uboot/patch/Y5IWpjYLB4aXMy9o@localhost/
>
> Cc: Simon Glass <sjg at chromium.org>
> Cc: Philipp Tomsich <philipp.tomsich at vrull.eu>
> Cc: Kever Yang <kever.yang at rock-chips.com>
> Cc: Lukasz Majewski <lukma at denx.de>
> Cc: Sean Anderson <seanga2 at gmail.com>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Christoph Fritz <chf.fritz at googlemail.com>
> Cc: Jagan Teki <jagan at amarulasolutions.com>
>
> Signed-off-by: Xavier Drudis Ferran <xdrudis at tinet.cat>
> ---
>
> v6: just retested over current next branch and some corrections
> to message and headers
> (no changes to code).
>
>
> v5: ignores the return value from property_enable() which is not
> an error code in U-Boot (unlike in linux). This avoid a false
> failure of rockchip_usb2phy_clk_disable() that interfered with
> clock disable and appeared to cause hang or reset.
>
> ---
> drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 78 ++++++++++++++++++-
> 1 file changed, 76 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 2f31350134..451841b025 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -55,6 +55,7 @@ struct rockchip_usb2phy_port_cfg {
>
> struct rockchip_usb2phy_cfg {
> unsigned int reg;
> + struct usb2phy_reg clkout_ctl;
> const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS];
> };
>
> @@ -76,6 +77,18 @@ static inline int property_enable(void *reg_base,
> return writel(val, reg_base + reg->offset);
> }
>
> +static inline bool property_enabled(void *reg_base,
> + const struct usb2phy_reg *reg)
> +{
> + unsigned int tmp, orig;
> + unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
> +
> + orig = readl(reg_base + reg->offset);
> +
> + tmp = (orig & mask) >> reg->bitstart;
Use FIELD_GET() macro if possible.
> + return tmp != reg->disable;
> +}
> +
> static const
> struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct phy *phy)
> {
> @@ -168,7 +181,63 @@ static struct phy_ops rockchip_usb2phy_ops = {
> .of_xlate = rockchip_usb2phy_of_xlate,
> };
[...]
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