[PATCH v6 2/2] arm: rk3399: usb2phy: phy-rockchip-inno-usb2.c: Implement operations for the 480MHz usb2phy clock in rk3399.
Xavier Drudis Ferran
xdrudis at tinet.cat
Mon Jun 5 00:30:08 CEST 2023
Thanks for looking at this.
El Sun, Jun 04, 2023 at 11:33:21AM +0200, Marek Vasut deia:
> > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > index 2f31350134..451841b025 100644
> > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> > @@ -55,6 +55,7 @@ struct rockchip_usb2phy_port_cfg {
> > struct rockchip_usb2phy_cfg {
> > unsigned int reg;
> > + struct usb2phy_reg clkout_ctl;
> > const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS];
> > };
> > @@ -76,6 +77,18 @@ static inline int property_enable(void *reg_base,
> > return writel(val, reg_base + reg->offset);
> > }
> > +static inline bool property_enabled(void *reg_base,
> > + const struct usb2phy_reg *reg)
> > +{
> > + unsigned int tmp, orig;
> > + unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
> > +
> > + orig = readl(reg_base + reg->offset);
> > +
> > + tmp = (orig & mask) >> reg->bitstart;
>
> Use FIELD_GET() macro if possible.
>
It would be possible, but it seems to require a constant mask. Now
the mask is read from a cfg struct, so it's not constant. Currently
the mask bitend and bitstart are really always the same value (4 and
4) for all (2) SOCs, so I could change the code to make it a
constant and use FIELD_GET(), but I'd see two drawbacks:
- It makes code more different than needed from linux
drivers/phy/rockchip/phy-rockchip-inno-usb2.c
- It will stop working if we ever support rk3366 here, the mask there
is bit 15.
So I'd rather leave it as it is.
But you made me realise I was missing the clkout_ctl struct for
rk3568, so I'll copy from linux in v7. I can't test it, though.
Thank you.
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