[PATCH 03/12] rockchip: rk3568-rock-3a: Sync device tree from linux
Kever Yang
kever.yang at rock-chips.com
Tue Mar 14 04:17:02 CET 2023
On 2023/3/14 08:38, Jonas Karlman wrote:
> Running U-Boot from eMMC on a ROCK 3 Model A result in the following:
>
> U-Boot SPL 2023.04-rc3 (Mar 11 2023 - 17:24:48 +0000)
> Trying to boot from MMC1
> Card did not respond to voltage select! : -110
> spl: mmc init failed with error: -95
> SPL: failed to boot from all boot devices
> ### ERROR ### Please RESET the board ###
>
> The sdhci node is missing in board device tree, sync device tree from
> linux v6.3-rc1 to fix booting from eMMC. Also disable sdmmc2 and uart1
> nodes related to using a WiFi and BT module in the M2 slot.
>
> Fixes: b44c54f600ab ("arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support")
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 10 +-
> arch/arm/dts/rk3568-rock-3a.dts | 261 +++++++++++++++++++++++-
> 2 files changed, 262 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> index b5ca23a82a20..04bbb01b5d51 100644
> --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> @@ -9,12 +9,16 @@
> / {
> chosen {
> stdout-path = &uart2;
> - u-boot,spl-boot-order = "same-as-spl", &sdmmc0;
> + u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
> };
> };
>
> -&sdmmc0 {
> - status = "okay";
> +&sdmmc2 {
> + status = "disabled";
> +};
> +
> +&uart1 {
> + status = "disabled";
> };
>
> &uart2 {
> diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts
> index a2f2baa4ea91..917f5b2b8aab 100644
> --- a/arch/arm/dts/rk3568-rock-3a.dts
> +++ b/arch/arm/dts/rk3568-rock-3a.dts
> @@ -1,22 +1,37 @@
> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> -/*
> - * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> - * Copyright (c) 2023 Akash Gajjar <gajjar04akash at gmail.com>
> - */
>
> /dts-v1/;
> #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> #include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> #include "rk3568.dtsi"
>
> / {
> model = "Radxa ROCK3 Model A";
> compatible = "radxa,rock3a", "rockchip,rk3568";
>
> + aliases {
> + ethernet0 = &gmac1;
> + mmc0 = &sdhci;
> + mmc1 = &sdmmc0;
> + };
> +
> chosen: chosen {
> stdout-path = "serial2:1500000n8";
> };
>
> + hdmi-con {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con_in: endpoint {
> + remote-endpoint = <&hdmi_out_con>;
> + };
> + };
> + };
> +
> gmac1_clkin: external-gmac1-clock {
> compatible = "fixed-clock";
> clock-frequency = <125000000>;
> @@ -24,13 +39,93 @@
> #clock-cells = <0>;
> };
>
> + leds {
> + compatible = "gpio-leds";
> +
> + led_user: led-0 {
> + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
> + function = LED_FUNCTION_HEARTBEAT;
> + color = <LED_COLOR_ID_BLUE>;
> + linux,default-trigger = "heartbeat";
> + pinctrl-names = "default";
> + pinctrl-0 = <&led_user_en>;
> + };
> + };
> +
> + rk809-sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,name = "Analog RK809";
> + simple-audio-card,mclk-fs = <256>;
> +
> + simple-audio-card,cpu {
> + sound-dai = <&i2s1_8ch>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&rk809>;
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + clocks = <&rk809 1>;
> + clock-names = "ext_clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable>;
> + post-power-on-delay-ms = <100>;
> + power-off-delay-us = <5000000>;
> + reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
> + };
> +
> vcc12v_dcin: vcc12v-dcin-regulator {
> compatible = "regulator-fixed";
> regulator-name = "vcc12v_dcin";
> regulator-always-on;
> regulator-boot-on;
> - regulator-min-microvolt = <12000000>;
> - regulator-max-microvolt = <12000000>;
> + };
> +
> + pcie30_avdd0v9: pcie30-avdd0v9-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "pcie30_avdd0v9";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + vin-supply = <&vcc3v3_sys>;
> + };
> +
> + pcie30_avdd1v8: pcie30-avdd1v8-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "pcie30_avdd1v8";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + vin-supply = <&vcc3v3_sys>;
> + };
> +
> + /* pi6c pcie clock generator */
> + vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_pi6c_03";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc3v3_pcie: vcc3v3-pcie-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_enable_h>;
> + regulator-name = "vcc3v3_pcie";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc5v0_sys>;
> };
>
> vcc3v3_sys: vcc3v3-sys-regulator {
> @@ -91,6 +186,7 @@
> enable-active-high;
> gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
> pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_usb_otg_en>;
> regulator-name = "vcc5v0_usb_otg";
> regulator-min-microvolt = <5000000>;
> regulator-max-microvolt = <5000000>;
> @@ -164,7 +260,43 @@
> clock_in_out = "input";
> phy-handle = <&rgmii_phy1>;
> phy-mode = "rgmii-id";
> + phy-supply = <&vcc_3v3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1m1_miim
> + &gmac1m1_tx_bus2
> + &gmac1m1_rx_bus2
> + &gmac1m1_rgmii_clk
> + &gmac1m1_clkinout
> + &gmac1m1_rgmii_bus>;
> + status = "okay";
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu>;
> + status = "okay";
> +};
> +
> +&hdmi {
> + avdd-0v9-supply = <&vdda0v9_image>;
> + avdd-1v8-supply = <&vcca1v8_image>;
> pinctrl-names = "default";
> + pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>;
> + status = "okay";
> +};
> +
> +&hdmi_in {
> + hdmi_in_vp0: endpoint {
> + remote-endpoint = <&vp0_out_hdmi>;
> + };
> +};
> +
> +&hdmi_out {
> + hdmi_out_con: endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> +};
> +
> +&hdmi_sound {
> status = "okay";
> };
>
> @@ -441,6 +573,13 @@
> };
>
> &i2s1_8ch {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
> + rockchip,trcm-sync-tx-only;
> + status = "okay";
> +};
> +
> +&i2s2_2ch {
> rockchip,trcm-sync-tx-only;
> status = "okay";
> };
> @@ -457,6 +596,27 @@
> };
> };
>
> +&pcie2x1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_reset_h>;
> + reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie>;
> + status = "okay";
> +};
> +
> +&pcie30phy {
> + phy-supply = <&vcc3v3_pi6c_03>;
> + status = "okay";
> +};
> +
> +&pcie3x2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie30x2m1_pins>;
> + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie>;
> + status = "okay";
> +};
> +
> &pinctrl {
> cam {
> vcc_cam_en: vcc_cam_en {
> @@ -551,6 +711,78 @@
> status = "okay";
> };
>
> +&saradc {
> + vref-supply = <&vcca_1v8>;
> + status = "okay";
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + max-frequency = <200000000>;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&sdmmc0 {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
> + sd-uhs-sdr50;
> + vmmc-supply = <&vcc3v3_sd>;
> + vqmmc-supply = <&vccio_sd>;
> + status = "okay";
> +};
> +
> +&sdmmc2 {
> + bus-width = <4>;
> + disable-wp;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + keep-power-in-suspend;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc3v3_sys>;
> + vqmmc-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&tsadc {
> + rockchip,hw-tshut-mode = <1>;
> + rockchip,hw-tshut-polarity = <0>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
> + uart-has-rtscts;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm43438-bt";
> + clocks = <&rk809 1>;
> + clock-names = "lpo";
> + device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
> + host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> + shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>;
> + vbat-supply = <&vcc3v3_sys>;
> + vddio-supply = <&vcc_1v8>;
> + /* vddio comes from regulator on module, use IO bank voltage instead */
> + };
> +};
> +
> &uart2 {
> status = "okay";
> };
> @@ -607,3 +839,20 @@
> phy-supply = <&vcc5v0_usb_host>;
> status = "okay";
> };
> +
> +&vop {
> + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
> + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
> + status = "okay";
> +};
> +
> +&vop_mmu {
> + status = "okay";
> +};
> +
> +&vp0 {
> + vp0_out_hdmi: endpoint at ROCKCHIP_VOP2_EP_HDMI0 {
> + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
> + remote-endpoint = <&hdmi_in_vp0>;
> + };
> +};
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