[PATCH v1 7/7] arm: dts: rockchip: rk3288: partial sync pwm nodes

Johan Jonker jbx6244 at gmail.com
Wed Mar 15 17:37:44 CET 2023



On 3/15/23 15:05, Simon Glass wrote:
> Hi Johan,
> 
> On Tue, 14 Mar 2023 at 12:16, Johan Jonker <jbx6244 at gmail.com> wrote:
>>
>> In order to better compare the Linux rk3288.dtsi
>> version 6.3 -rc2 with the u-boot version partial
>> sync the pwm nodes.
>>
>> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
>> ---
>>  arch/arm/dts/rk3288.dtsi | 18 +++++-------------
>>  1 file changed, 5 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
>> index f24e9ba5..dd1d9897 100644
>> --- a/arch/arm/dts/rk3288.dtsi
>> +++ b/arch/arm/dts/rk3288.dtsi
>> @@ -675,9 +675,7 @@
>>                 #pwm-cells = <3>;
>>                 pinctrl-names = "default";
>>                 pinctrl-0 = <&pwm0_pin>;
>> -               clocks = <&cru PCLK_PWM>;
>> -               clock-names = "pwm";
>> -               rockchip,grf = <&grf>;
>> +               clocks = <&cru PCLK_RKPWM>;
>>                 status = "disabled";
>>         };
>>
>> @@ -687,9 +685,7 @@
>>                 #pwm-cells = <3>;
>>                 pinctrl-names = "default";
>>                 pinctrl-0 = <&pwm1_pin>;
>> -               clocks = <&cru PCLK_PWM>;
>> -               clock-names = "pwm";
>> -               rockchip,grf = <&grf>;
>> +               clocks = <&cru PCLK_RKPWM>;
>>                 status = "disabled";
>>         };
>>
>> @@ -699,21 +695,17 @@
>>                 #pwm-cells = <3>;
>>                 pinctrl-names = "default";
>>                 pinctrl-0 = <&pwm2_pin>;
>> -               clocks = <&cru PCLK_PWM>;
>> -               clock-names = "pwm";
>> -               rockchip,grf = <&grf>;
>> +               clocks = <&cru PCLK_RKPWM>;
>>                 status = "disabled";
>>         };
>>
>>         pwm3: pwm at ff680030 {
>>                 compatible = "rockchip,rk3288-pwm";
>>                 reg = <0xff680030 0x10>;
>> -               #pwm-cells = <2>;
>> +               #pwm-cells = <3>;
> 

> How can we do this without breaking the existing pwm usage in U-Boot?

===

>From binding pwm-rockchip.yaml:

  "#pwm-cells":
    enum: [2, 3]
    description:
      Must be 2 (rk2928) or 3 (rk3288 and later).
      See pwm.yaml for a description of the cell format.

===

>From binding pwm.txt:

pwm-specifier typically encodes the chip-relative PWM number and the PWM
period in nanoseconds.

Optionally, the pwm-specifier can encode a number of flags (defined in
<dt-bindings/pwm/pwm.h>) in a third cell:
- PWM_POLARITY_INVERTED: invert the PWM signal polarity

===

Fixed with patch:

[PATCH] ARM: dts: rockchip: fix pwm-cells for rk3288's pwm3
https://lore.kernel.org/all/20190603143435.23352-1-john@metanate.com/

===

U-Boot driver is ready:

static const struct rockchip_pwm_data pwm_data_v2 = {
[..]
	.supports_polarity = true,
[..]
};

	{ .compatible = "rockchip,rk3288-pwm", .data = (ulong)&pwm_data_v2},
===

git grep "pwms = <&pwm" | grep rk3288

rk3288-evb.dtsi:		pwms = <&pwm0 0 25000 0>;
rk3288-veyron.dtsi:		pwms = <&pwm0 0 1000000 0>;
rk3288-veyron.dtsi:		pwms = <&pwm1 0 2000 0>;

Given that there are no current users and the driver supports polarity I think it's save to set #pwm-cells to 3.
(Unless someone calls out a specific case not to change)

Johan

> 
>>                 pinctrl-names = "default";
>>                 pinctrl-0 = <&pwm3_pin>;
>> -               clocks = <&cru PCLK_PWM>;
>> -               clock-names = "pwm";
>> -               rockchip,grf = <&grf>;
>> +               clocks = <&cru PCLK_RKPWM>;
>>                 status = "disabled";
>>         };
>>
>> --
>> 2.20.1
>>
> 
> Regards,
> Simon


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