[PATCH v2 10/22] sunxi: introduce NCAT2 generation model

Samuel Holland samuel at sholland.org
Sun Oct 22 05:40:59 CEST 2023


Hi Andre,

On 9/28/23 16:54, Andre Przywara wrote:
> Allwinner seems to typically stick to a common MMIO memory map for
> several SoCs, but from time to time does some breaking changes, which
> also introduce new generations of some peripherals. The last time this
> happened with the H6, which apart from re-organising the base addresses
> also changed the clock controller significantly. We added a
> CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits.
> 
> Now the Allwinner D1 changes the memory map again, and also extends the
> pincontroller, among other peripherals.
> To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol,
> this name is reportedly used in the Allwinner BSP code, and prevents us
> from inventing our own name.
> 
> Add this new symbol to some guards that were already checking for the H6
> generation, since many features are shared between the two (like the
> renovated clock controller).
> 
> This paves the way to introduce a first user of this generation.
> 
> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> ---
>  arch/arm/include/asm/arch-sunxi/clock.h       |  2 +-
>  arch/arm/include/asm/arch-sunxi/cpu.h         |  2 +
>  .../include/asm/arch-sunxi/cpu_sunxi_ncat2.h  | 43 +++++++++++++++++++
>  arch/arm/include/asm/arch-sunxi/mmc.h         |  2 +-
>  arch/arm/include/asm/arch-sunxi/prcm.h        |  2 +-
>  arch/arm/include/asm/arch-sunxi/timer.h       |  2 +-
>  arch/arm/mach-sunxi/Kconfig                   | 12 +++++-
>  arch/arm/mach-sunxi/Makefile                  |  1 +
>  arch/arm/mach-sunxi/board.c                   | 22 ++++++----
>  arch/arm/mach-sunxi/clock_sun50i_h6.c         |  7 ++-
>  common/spl/Kconfig                            |  2 +-
>  drivers/i2c/mvtwsi.c                          |  3 +-
>  drivers/mmc/sunxi_mmc.c                       |  7 +--
>  include/sunxi_gpio.h                          |  3 ++
>  14 files changed, 90 insertions(+), 20 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h
> index 2cfd5407423..3d34261b0e5 100644
> --- a/arch/arm/include/asm/arch-sunxi/clock.h
> +++ b/arch/arm/include/asm/arch-sunxi/clock.h
> @@ -16,7 +16,7 @@
>  /* clock control module regs definition */
>  #if defined(CONFIG_MACH_SUN8I_A83T)
>  #include <asm/arch/clock_sun8i_a83t.h>
> -#elif defined(CONFIG_SUN50I_GEN_H6)
> +#elif defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2)
>  #include <asm/arch/clock_sun50i_h6.h>
>  #elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \
>        defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUNIV)
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h
> index b08f2023748..768c6572d6b 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu.h
> @@ -10,6 +10,8 @@
>  #include <asm/arch/cpu_sun9i.h>
>  #elif defined(CONFIG_SUN50I_GEN_H6)
>  #include <asm/arch/cpu_sun50i_h6.h>
> +#elif defined(CONFIG_SUNXI_GEN_NCAT2)
> +#include <asm/arch/cpu_sunxi_ncat2.h>
>  #else
>  #include <asm/arch/cpu_sun4i.h>
>  #endif
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
> new file mode 100644
> index 00000000000..ca92c39927d
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
> @@ -0,0 +1,43 @@
> +/*
> + * (C) Copyright 2022 Arm Limited
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef _SUNXI_CPU_SUNXI_NCAT2_H
> +#define _SUNXI_CPU_SUNXI_NCAT2_H
> +
> +#define SUNXI_CCM_BASE			0x02001000
> +#define SUNXI_TIMER_BASE		0x02050000
> +
> +#define SUNXI_UART0_BASE		0x02500000
> +#define SUNXI_UART1_BASE		0x02500400
> +#define SUNXI_UART2_BASE		0x02500800
> +#define SUNXI_UART3_BASE		0x02500C00
> +#define SUNXI_TWI0_BASE			0x02502000
> +#define SUNXI_TWI1_BASE			0x02502400
> +#define SUNXI_TWI2_BASE			0x02502800
> +#define SUNXI_TWI3_BASE			0x02502C00
> +
> +#define SUNXI_SRAMC_BASE		0x03000000
> +/* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */
> +#define SUNXI_SIDC_BASE			0x03006000
> +#define SUNXI_SID_BASE			0x03006200
> +#define SUNXI_GIC400_BASE		0x03020000
> +
> +#define SUNXI_MMC0_BASE			0x04020000
> +#define SUNXI_MMC1_BASE			0x04021000
> +#define SUNXI_MMC2_BASE			0x04022000
> +
> +#define SUNXI_R_CPUCFG_BASE		0x07000400
> +#define SUNXI_PRCM_BASE			0x07010000
> +
> +#define SUNXI_CPUCFG_BASE		0x09010000
> +
> +#ifndef __ASSEMBLY__
> +void sunxi_board_init(void);
> +void sunxi_reset(void);
> +int sunxi_get_sid(unsigned int *sid);
> +#endif
> +
> +#endif /* _SUNXI_CPU_SUNXI_NCAT2_H */
> diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h
> index 5daacf10eb1..8ed3e0459c9 100644
> --- a/arch/arm/include/asm/arch-sunxi/mmc.h
> +++ b/arch/arm/include/asm/arch-sunxi/mmc.h
> @@ -45,7 +45,7 @@ struct sunxi_mmc {
>  	u32 chda;		/* 0x90 */
>  	u32 cbda;		/* 0x94 */
>  	u32 res2[26];
> -#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
> +#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2)
>  	u32 res3[17];
>  	u32 samp_dl;
>  	u32 res4[46];
> diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h
> index 5106076f5e9..c5418cfd28d 100644
> --- a/arch/arm/include/asm/arch-sunxi/prcm.h
> +++ b/arch/arm/include/asm/arch-sunxi/prcm.h
> @@ -9,7 +9,7 @@
>  #define _SUNXI_PRCM_H
>  
>  /* prcm regs definition */
> -#if defined(CONFIG_SUN50I_GEN_H6)
> +#if defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2)
>  #include <asm/arch/prcm_sun50i.h>
>  #else
>  #include <asm/arch/prcm_sun6i.h>
> diff --git a/arch/arm/include/asm/arch-sunxi/timer.h b/arch/arm/include/asm/arch-sunxi/timer.h
> index bb5626d893b..e17db8588e2 100644
> --- a/arch/arm/include/asm/arch-sunxi/timer.h
> +++ b/arch/arm/include/asm/arch-sunxi/timer.h
> @@ -76,7 +76,7 @@ struct sunxi_timer_reg {
>  	struct sunxi_tgp tgp[4];
>  	u8 res5[8];
>  	u32 cpu_cfg;
> -#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
> +#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2)
>  	u8 res3[16];
>  	struct sunxi_wdog wdog[5];	/* We have 5 watchdogs */
>  #endif
> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> index d73c5e67050..12eb51b2ea4 100644
> --- a/arch/arm/mach-sunxi/Kconfig
> +++ b/arch/arm/mach-sunxi/Kconfig
> @@ -121,7 +121,7 @@ config AXP_PMIC_BUS
>  config SUNXI_SRAM_ADDRESS
>  	hex
>  	default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
> -	default 0x20000 if SUN50I_GEN_H6
> +	default 0x20000 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
>  	default 0x0
>  	---help---
>  	Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
> @@ -189,6 +189,14 @@ config SUN50I_GEN_H6
>  	Select this for sunxi SoCs which have H6 like peripherals, clocks
>  	and memory map.
>  
> +config SUNXI_GEN_NCAT2
> +	bool
> +	select MMC_SUNXI_HAS_NEW_MODE
> +	select SUPPORT_SPL
> +	---help---
> +	Select this for sunxi SoCs which have D1 like peripherals, clocks
> +	and memory map.


This will eventually need to go in board/sunxi/Kconfig, so it can be
selected by D1 (ARCH_SUNXI=n). For now:

Tested-by: Samuel Holland <samuel at sholland.org>



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