[PATCH 2/2] riscv: jh7110: enable riscv,timer in the device tree

[Leo Liang]

On Mon, Aug 14, 2023 at 06:05:33PM +0200, Torsten Duwe wrote:
> The JH7110 has the arhitectural CPU timer on all 5 rv64 cores.
> Note that in the device tree.
> 
> Signed-off-by: Torsten Duwe <duwe at suse.de>
> ---
>  arch/riscv/dts/jh7110.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)

Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>