[PATCH v2] arm64: zynqmp: Add output-enable pins to SOMs
Michal Simek
michal.simek at amd.com
Thu Sep 7 13:23:43 CEST 2023
On 8/31/23 16:27, Michal Simek wrote:
> From: Neal Frager <neal.frager at amd.com>
>
> Now that the zynqmp pinctrl driver supports the tri-state registers, make
> sure that the pins requiring output-enable are configured appropriately for
> SOMs.
>
> Without it, all tristate setting for MIOs, which are not related to SOM
> itself, are using default configuration which is not correct setting.
> It means SDs, USBs, ethernet, etc. are not working properly.
>
> In past it was fixed through calling tristate configuration via bootcmd:
> usb_init=mw 0xFF180208 2020
> kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio at ff0a000038 && \
> gpio toggle gpio at ff0a000038
>
> Signed-off-by: Neal Frager <neal.frager at amd.com>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
>
> Changes in v2:
> - update commit message
> - add also fixes for kr260-revB and kv260-revA/B
>
> arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 6 ++++++
> arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 6 ++++++
> arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 +++++
> arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 +++++
> 4 files changed, 22 insertions(+)
>
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
> index d318773bd9d6..30a0230d4767 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
> @@ -250,6 +250,7 @@
> conf-tx {
> pins = "MIO36";
> bias-disable;
> + output-enable;
> };
>
> mux {
> @@ -301,6 +302,7 @@
> conf-bootstrap {
> pins = "MIO45", "MIO47", "MIO49";
> bias-disable;
> + output-enable;
> low-power-disable;
> };
>
> @@ -308,6 +310,7 @@
> pins = "MIO38", "MIO39", "MIO40",
> "MIO41", "MIO42", "MIO43";
> bias-disable;
> + output-enable;
> low-power-enable;
> };
>
> @@ -316,6 +319,7 @@
> slew-rate = <SLEW_RATE_SLOW>;
> power-source = <IO_STANDARD_LVCMOS18>;
> bias-disable;
> + output-enable;
> };
>
> mux-mdio {
> @@ -346,6 +350,7 @@
> pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
> "MIO60", "MIO61", "MIO62", "MIO63";
> bias-disable;
> + output-enable;
> drive-strength = <4>;
> slew-rate = <SLEW_RATE_SLOW>;
> };
> @@ -373,6 +378,7 @@
> pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
> "MIO72", "MIO73", "MIO74", "MIO75";
> bias-disable;
> + output-enable;
> drive-strength = <4>;
> slew-rate = <SLEW_RATE_SLOW>;
> };
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
> index 69dba0761b37..8f4c52d6d643 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
> @@ -250,6 +250,7 @@
> conf-tx {
> pins = "MIO36";
> bias-disable;
> + output-enable;
> };
>
> mux {
> @@ -301,6 +302,7 @@
> conf-bootstrap {
> pins = "MIO45", "MIO47", "MIO49";
> bias-disable;
> + output-enable;
> low-power-disable;
> };
>
> @@ -308,6 +310,7 @@
> pins = "MIO38", "MIO39", "MIO40",
> "MIO41", "MIO42", "MIO43";
> bias-disable;
> + output-enable;
> low-power-enable;
> };
>
> @@ -316,6 +319,7 @@
> slew-rate = <SLEW_RATE_SLOW>;
> power-source = <IO_STANDARD_LVCMOS18>;
> bias-disable;
> + output-enable;
> };
>
> mux-mdio {
> @@ -346,6 +350,7 @@
> pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
> "MIO60", "MIO61", "MIO62", "MIO63";
> bias-disable;
> + output-enable;
> drive-strength = <4>;
> slew-rate = <SLEW_RATE_SLOW>;
> };
> @@ -373,6 +378,7 @@
> pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
> "MIO72", "MIO73", "MIO74", "MIO75";
> bias-disable;
> + output-enable;
> drive-strength = <4>;
> slew-rate = <SLEW_RATE_SLOW>;
> };
> diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
> index a81b3f6f51ad..55bef1df75d0 100644
> --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
> +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
> @@ -205,6 +205,7 @@
> conf-tx {
> pins = "MIO36";
> bias-disable;
> + output-enable;
> };
>
> mux {
> @@ -256,6 +257,7 @@
> conf-bootstrap {
> pins = "MIO71", "MIO73", "MIO75";
> bias-disable;
> + output-enable;
> low-power-disable;
> };
>
> @@ -263,6 +265,7 @@
> pins = "MIO64", "MIO65", "MIO66",
> "MIO67", "MIO68", "MIO69";
> bias-disable;
> + output-enable;
> low-power-enable;
> };
>
> @@ -271,6 +274,7 @@
> slew-rate = <SLEW_RATE_SLOW>;
> power-source = <IO_STANDARD_LVCMOS18>;
> bias-disable;
> + output-enable;
> };
>
> mux-mdio {
> @@ -301,6 +305,7 @@
> pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
> "MIO60", "MIO61", "MIO62", "MIO63";
> bias-disable;
> + output-enable;
> drive-strength = <4>;
> slew-rate = <SLEW_RATE_SLOW>;
> };
> diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
> index f935f25c887f..1b1d9e772f55 100644
> --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
> +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
> @@ -193,6 +193,7 @@
> conf-tx {
> pins = "MIO36";
> bias-disable;
> + output-enable;
> };
>
> mux {
> @@ -244,6 +245,7 @@
> conf-bootstrap {
> pins = "MIO71", "MIO73", "MIO75";
> bias-disable;
> + output-enable;
> low-power-disable;
> };
>
> @@ -251,6 +253,7 @@
> pins = "MIO64", "MIO65", "MIO66",
> "MIO67", "MIO68", "MIO69";
> bias-disable;
> + output-enable;
> low-power-enable;
> };
>
> @@ -259,6 +262,7 @@
> slew-rate = <SLEW_RATE_SLOW>;
> power-source = <IO_STANDARD_LVCMOS18>;
> bias-disable;
> + output-enable;
> };
>
> mux-mdio {
> @@ -289,6 +293,7 @@
> pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
> "MIO60", "MIO61", "MIO62", "MIO63";
> bias-disable;
> + output-enable;
> drive-strength = <4>;
> slew-rate = <SLEW_RATE_SLOW>;
> };
Applied.
M
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