[PATCH v3 10/16] arm: dts: Introduce am69-sk dts from linux kernel
Marcel Ziswiler
marcel.ziswiler at toradex.com
Tue Sep 12 14:10:23 CEST 2023
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> From: Dasnavis Sabiya <sabiya.d at ti.com>
>
> Introduce the basic am69-sk evm dts from the next-20230905 tag of the
> linux kernel.
>
> Signed-off-by: Dasnavis Sabiya <sabiya.d at ti.com>
> Signed-off-by: Apurva Nandan <a-nandan at ti.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/k3-am69-sk.dts | 364 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 366 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/k3-am69-sk.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 363f7a1171..1bcdbea9e5 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1330,7 +1330,8 @@ dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
> k3-am68-sk-r5-base-board.dtb\
> k3-j721s2-common-proc-board.dtb\
> k3-j721s2-r5-common-proc-board.dtb
> -dtb-$(CONFIG_SOC_K3_J784S4) += k3-j784s4-evm.dtb\
> +dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-sk.dtb\
> + k3-j784s4-evm.dtb\
> k3-j784s4-r5-evm.dtb
> dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
> k3-am642-r5-evm.dtb \
> diff --git a/arch/arm/dts/k3-am69-sk.dts b/arch/arm/dts/k3-am69-sk.dts
> new file mode 100644
> index 0000000000..0699370911
> --- /dev/null
> +++ b/arch/arm/dts/k3-am69-sk.dts
> @@ -0,0 +1,364 @@
> +// SPDX-License-Identifier: GPL-2.0
Should be:
GPL-2.0-only
> +/*
> + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
> + *
> + * Design Files: https://www.ti.com/lit/zip/SPRR466
> + * TRM: https://www.ti.com/lit/zip/spruj52
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/net/ti-dp83867.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-j784s4.dtsi"
> +
> +/ {
> + compatible = "ti,am69-sk", "ti,j784s4";
> + model = "Texas Instruments AM69 SK";
I never understood TI's naming. Somewhere they call it Evaluation Module (EVM), somewhere Starter Kit (SK) and
even at other places Evaluation Board (EVB).
> +
> + chosen {
> + stdout-path = "serial2:115200n8";
> + };
> +
> + aliases {
> + serial0 = &wkup_uart0;
> + serial1 = &mcu_uart0;
> + serial2 = &main_uart8;
> + mmc0 = &main_sdhci0;
> + mmc1 = &main_sdhci1;
> + i2c0 = &wkup_i2c0;
> + i2c3 = &main_i2c0;
> + ethernet0 = &mcu_cpsw_port1;
> + };
> +
> + memory at 80000000 {
> + device_type = "memory";
> + /* 32G RAM */
> + reg = <0x00 0x80000000 0x00 0x80000000>,
> + <0x08 0x80000000 0x07 0x80000000>;
> + };
> +
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secure_ddr: optee at 9e800000 {
> + reg = <0x00 0x9e800000 0x00 0x01800000>;
> + no-map;
> + };
> + };
> +
> + vusb_main: regulator-vusb-main5v0 {
> + /* USB MAIN INPUT 5V DC */
> + compatible = "regulator-fixed";
> + regulator-name = "vusb-main5v0";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vsys_5v0: regulator-vsys5v0 {
> + /* Output of LM61460 */
> + compatible = "regulator-fixed";
> + regulator-name = "vsys_5v0";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vusb_main>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vsys_3v3: regulator-vsys3v3 {
> + /* Output of LM5143 */
> + compatible = "regulator-fixed";
> + regulator-name = "vsys_3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vusb_main>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_mmc1: regulator-sd {
> + /* Output of TPS22918 */
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_mmc1";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + enable-active-high;
> + vin-supply = <&vsys_3v3>;
> + gpio = <&exp1 2 GPIO_ACTIVE_HIGH>;
> + };
> +
> + vdd_sd_dv: regulator-tlv71033 {
> + /* Output of TLV71033 */
> + compatible = "regulator-gpio";
> + regulator-name = "tlv71033";
> + pinctrl-names = "default";
> + pinctrl-0 = <&vdd_sd_dv_pins_default>;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + vin-supply = <&vsys_5v0>;
> + gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
> + states = <1800000 0x0>,
> + <3300000 0x1>;
> + };
> +};
> +
> +&main_pmx0 {
> + bootph-all;
> + main_uart8_pins_default: main-uart8-default-pins {
> + bootph-all;
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */
> + J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */
> + >;
> + };
> +
> + main_i2c0_pins_default: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
> + J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
> + >;
> + };
> +
> + main_mmc1_pins_default: main-mmc1-default-pins {
> + bootph-all;
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
> + J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
> + J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */
> + J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */
> + J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */
> + J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */
> + J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */
> + J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */
> + >;
> + };
> +
> + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x0C4, PIN_INPUT, 7) /* (AD36) ECAP0_IN_APWM_OUT.GPIO0_49 */
> + >;
> + };
> +
> + rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x0BC, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */
> + J784S4_IOPAD(0x06C, PIN_INPUT, 7) /* (AJ37) MCASP4_AFSX.GPIO0_27 */
> + J784S4_IOPAD(0x0B4, PIN_INPUT, 7) /* (AL34) MCASP1_AXR4.GPIO0_45 */
> + J784S4_IOPAD(0x0C0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */
> + J784S4_IOPAD(0x00C, PIN_INPUT, 7) /* (AF33) MCAN13_TX.GPIO0_3 */
> + J784S4_IOPAD(0x0B8, PIN_INPUT, 7) /* (AC34) MCASP1_ACLKX.GPIO0_46 */
> + J784S4_IOPAD(0x090, PIN_INPUT, 7) /* (AC35) MCASP0_AXR8.GPIO0_36 */
> + J784S4_IOPAD(0x0A8, PIN_INPUT, 7) /* (AF34) MCASP0_AXR14.GPIO0_42 */
> + J784S4_IOPAD(0x0A4, PIN_INPUT, 7) /* (AJ36) MCASP0_AXR13.GPIO0_41 */
> + J784S4_IOPAD(0x034, PIN_INPUT, 7) /* (AJ34) PMIC_WAKE0n.GPIO0_13 */
> + J784S4_IOPAD(0x0CC, PIN_INPUT, 7) /* (AM37) SPI0_CS0.GPIO0_51 */
> + J784S4_IOPAD(0x08C, PIN_INPUT, 7) /* (AE35) MCASP0_AXR7.GPIO0_35 */
> + J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */
> + J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */
> + >;
> + };
> +};
> +
> +&wkup_pmx2 {
> + bootph-all;
> + wkup_uart0_pins_default: wkup-uart0-default-pins {
> + bootph-all;
> + pinctrl-single,pins = <
> + J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
> + J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
> + J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
> + J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
> + >;
> + };
> +
> + wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> + bootph-all;
> + pinctrl-single,pins = <
> + J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
> + J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
> + >;
> + };
> +
> + mcu_uart0_pins_default: mcu-uart0-default-pins {
> + bootph-all;
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (K38) WKUP_GPIO0_13.MCU_UART0_RXD */
> + J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (J37) WKUP_GPIO0_12.MCU_UART0_TXD */
> + >;
> + };
> +
> + mcu_i2c0_pins_default: mcu-i2c0-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT_PULLUP, 0) /* (M35) MCU_I2C0_SCL */
> + J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT_PULLUP, 0) /* (G34) MCU_I2C0_SDA */
> + >;
> + };
> +
> + mcu_cpsw_pins_default: mcu-cpsw-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
> + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
> + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
> + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
> + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
> + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
> + J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
> + J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
> + J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
> + J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
> + J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
> + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
> + >;
> + };
> +
> + mcu_mdio_pins_default: mcu-mdio-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
> + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
> + >;
> + };
> +
> + mcu_rpi_hdr1_gpio0_pins_default: mcu-rpi-hdr1-gpio0-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (N34) WKUP_GPIO0_66 */
> + J784S4_WKUP_IOPAD(0x05c, PIN_INPUT, 7) /* (J34) WKUP_GPIO0_1 */
> + J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */
> + J784S4_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (H38) WKUP_GPIO0_0 */
> + J784S4_WKUP_IOPAD(0x0b8, PIN_INPUT, 7) /* (M37) WKUP_GPIO0_56 */
> + J784S4_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (M36) WKUP_GPIO0_57 */
> + J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (K37) WKUP_GPIO0_15 */
> + J784S4_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (J36) WKUP_GPIO0_3 */
> + J784S4_WKUP_IOPAD(0x11c, PIN_INPUT, 7) /* (M34) WKUP_GPIO0_67 */
> + >;
> + };
> +};
> +
> +&wkup_pmx3 {
> + mcu_rpi_hdr2_gpio0_pins_default: mcu-rpi-hdr2-gpio0-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x0, PIN_INPUT, 7) /* (M33) WKUP_GPIO0_49 */
> + >;
> + };
> +};
> +
> +&wkup_uart0 {
> + /* Firmware usage */
> + status = "reserved";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wkup_uart0_pins_default>;
> +};
> +
> +&wkup_i2c0 {
> + bootph-all;
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wkup_i2c0_pins_default>;
> + clock-frequency = <400000>;
> +
> + eeprom at 51 {
> + /* AT24C512C-MAHM-T */
> + compatible = "atmel,24c512";
> + reg = <0x51>;
> + };
> +};
> +
> +&wkup_gpio0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_rpi_hdr1_gpio0_pins_default>, <&mcu_rpi_hdr2_gpio0_pins_default>;
> +};
> +
> +&mcu_uart0 {
> + bootph-all;
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_uart0_pins_default>;
> +};
> +
> +&mcu_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_i2c0_pins_default>;
> + clock-frequency = <400000>;
> +};
> +
> +&main_uart8 {
> + bootph-all;
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_uart8_pins_default>;
> +};
> +
> +&main_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> +
> + exp1: gpio at 21 {
> + compatible = "ti,tca6416";
> + reg = <0x21>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names = "BOARDID_EEPROM_WP", "CAN_STB", "GPIO_uSD_PWR_EN",
> + "IO_EXP_MCU_RGMII_RST#", "IO_EXP_PCIe0_4L_PERST#",
> + "IO_EXP_PCIe1_M.2_RTSz", "IO_EXP_PCIe3_M.2_RTSz",
> + "PM_INA_BUS_EN", "ENET1_EXP_PWRDN", "EXP1_ENET_RSTz",
> + "ENET1_I2CMUX_SEL", "PCIe0_CLKREQ#", "PCIe1_M.2_CLKREQ#",
> + "PCIe3_M2_CLKREQ#", "PCIe0_PRSNT2#_1", "PCIe0_PRSNT2#_2";
> + };
> +};
> +
> +&main_sdhci0 {
> + bootph-all;
> + /* eMMC */
> + status = "okay";
> + non-removable;
> + ti,driver-strength-ohm = <50>;
> + disable-wp;
> +};
> +
> +&main_sdhci1 {
> + bootph-all;
> + /* SD card */
> + status = "okay";
> + pinctrl-0 = <&main_mmc1_pins_default>;
> + pinctrl-names = "default";
> + disable-wp;
> + vmmc-supply = <&vdd_mmc1>;
> + vqmmc-supply = <&vdd_sd_dv>;
> +};
> +
> +&main_gpio0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&rpi_header_gpio0_pins_default>;
> +};
> +
> +&mcu_cpsw {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
> +};
> +
> +&davinci_mdio {
> + mcu_phy0: ethernet-phy at 0 {
> + reg = <0>;
> + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> + ti,min-output-impedance;
> + };
> +};
> +
> +&mcu_cpsw_port1 {
> + status = "okay";
> + phy-mode = "rgmii-rxid";
> + phy-handle = <&mcu_phy0>;
> +};
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