bootstd: CACHE Misaligned operation errors (Marvell Armada 385)

[Tony Dinh]

I've been testing the boostd for a few Marvell boards and seeing this
error on the Thecus N2350 (Marvell Armada 385, dual-core CPU). The
"bootflow scan scsi" command triggered the "CACHE: Misaligned
operation at range" error. However, this error did not affect the
result of the scan, i.e. the bootflow for scsi partition was created
correctly, and u-boot is running normally.

Enabling CONFIG_SYS_DCACHE_OFF got rid of the errors altogether.
Perhaps this is a case where the DCACHE is not required and should be
turned off?

Please see the log after the break below.

All the best,
Tony

========

U-Boot 2023.10-rc4-tld-1-00036-gbb16283b81-dirty (Sep 11 2023 - 11:56:18 -0700)
Thecus N2350

SoC:   MV88F6820-A0 at 1066 MHz
DRAM:  1 GiB (533 MHz, 32-bit, ECC not enabled)
Core:  65 devices, 23 uclasses, devicetree: separate
NAND:  512 MiB
MMC:
Loading Environment from SPIFlash... SF: Detected mx25l3205d with page
size 256 Bytes, erase size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment

Model: Thecus N2350
Net:
Warning: ethernet at 70000 (eth0) using random MAC address - be:13:ae:99:49:ab
eth0: ethernet at 70000
Hit any key to stop autoboot:  0

N2350 > env def -a
## Resetting to default environment

N2350 > bootdev l
Seq  Probed  Status  Uclass    Name
---  ------  ------  --------  ------------------
  0   [   ]      OK  ethernet  ethernet at 70000.bootdev
---  ------  ------  --------  ------------------
(1 bootdev)

N2350 > bootdev hunt scsi
Hunting with: scsi
pcie0.0: Link down
pcie1.0: Link down
scanning bus for devices...
SATA link 0 timeout.
Target spinup took 0 ms.
AHCI 0001.0000 32 slots 2 ports 6 Gbps 0x3 impl SATA mode
flags: 64bit ncq led only pmp fbss pio slum part sxs
  Device 0: (1:0) Vendor: ATA Prod.: ST750LX003-1AC15 Rev: SM12
            Type: Hard Disk
            Capacity: 715404.8 MB = 698.6 GB (1465149168 x 512)

N2350 > bootflow scan usb
Bus usb at 58000: USB EHCI 1.00
Bus usb3 at f0000: MVEBU XHCI INIT controller @ 0xf10f4000
Register 2000120 NbrPorts 2
Starting the controller
USB XHCI 1.00
Bus usb3 at f8000: MVEBU XHCI INIT controller @ 0xf10fc000
Register 2000120 NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus usb at 58000 for devices... 1 USB Device(s) found
scanning bus usb3 at f0000 for devices... 1 USB Device(s) found
scanning bus usb3 at f8000 for devices... 2 USB Device(s) found
** File not found /boot/boot.bmp **

N2350 > bootflow scan scsi
CACHE: Misaligned operation at range [3fb7fe48, 3fb80248]
CACHE: Misaligned operation at range [3fb7fe48, 3fb80248]
CACHE: Misaligned operation at range [3fb7fe48, 3fb80248]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x3fb7fe48
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x3fb80248
** File not found /boot/boot.bmp **
** File not found /boot/boot.bmp **

N2350 > bootflow scan scsi
CACHE: Misaligned operation at range [3fb88a88, 3fb88e88]
CACHE: Misaligned operation at range [3fb88a88, 3fb88e88]
CACHE: Misaligned operation at range [3fb88a88, 3fb88e88]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x3fb88a88
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x3fb88e88
** File not found /boot/boot.bmp **
** File not found /boot/boot.bmp **

N2350 > bootflow l
Showing all bootflows
Seq  Method       State   Uclass    Part  Name                      Filename
---  -----------  ------  --------  ----  ------------------------
----------------
  0  script       ready   scsi         1  ahci_scsi.id1lun0.bootdev
/boot/boot.scr
  1  script       ready   usb_mass_    1  usb_mass_storage.lun0.boo
/boot/boot.scr
---  -----------  ------  --------  ----  ------------------------
----------------
(2 bootflows, 2 valid)

N2350 > boot
Scanning for bootflows in all bootdevs
Seq  Method       State   Uclass    Part  Name                      Filename
---  -----------  ------  --------  ----  ------------------------
----------------
Scanning global bootmeth 'efi_mgr':
Hunting with: mmc
Scanning bootdev 'ahci_scsi.id1lun0.bootdev':
CACHE: Misaligned operation at range [3fb91d08, 3fb92108]
CACHE: Misaligned operation at range [3fb91d08, 3fb92108]
CACHE: Misaligned operation at range [3fb91d08, 3fb92108]
ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x3fb91d08
ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x3fb92108
** File not found /boot/boot.bmp **
  0  script       ready   scsi         1  ahci_scsi.id1lun0.bootdev
/boot/boot.scr
** Booting bootflow 'ahci_scsi.id1lun0.bootdev.part_1' with script
Booting with distro boot script
loading uImage from scsi 0:1 ...
5118888 bytes read in 120 ms (40.7 MiB/s)
loading uInitrd from scsi 0:1 ...
7355687 bytes read in 197 ms (35.6 MiB/s)
loading DTB file from scsi 0:1 ...
20906 bytes read in 16 ms (1.2 MiB/s)
## Booting kernel from Legacy Image at 01000000 ...
   Image Name:   Linux-6.4.11-mvebu-tld-1
   Created:      2023-08-20  17:34:55 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    5118824 Bytes = 4.9 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 02200000 ...
   Image Name:   initramfs-6.4.11-mvebu-tld-1
   Created:      2023-08-20  17:34:57 UTC
   Image Type:   ARM Linux RAMDisk Image (gzip compressed)
   Data Size:    7355623 Bytes = 7 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
   Booting using the fdt blob at 0x2000000
Working FDT set to 2000000


Starting kernel ...

   Loading Kernel Image
   Loading Ramdisk to 0f8fc000, end 0ffffce7 ... OK
   Loading Device Tree to 0f8f3000, end 0f8fb1a9 ... OK
Working FDT set to f8f3000

Starting kernel ...