bootstd: CACHE Misaligned operation errors (Marvell Armada 385)

Tony Dinh mibodhi at gmail.com
Thu Sep 14 06:53:53 CEST 2023


Hi Simon,

On Wed, Sep 13, 2023 at 8:38 PM Simon Glass <sjg at chromium.org> wrote:
>
> Hi Tom,
>
> On Wed, 13 Sept 2023 at 14:14, Tom Rini <trini at konsulko.com> wrote:
> >
> > On Wed, Sep 13, 2023 at 12:56:53PM -0700, Tony Dinh wrote:
> > > Hi Tom,
> > >
> > > On Wed, Sep 13, 2023 at 9:22 AM Tom Rini <trini at konsulko.com> wrote:
> > > >
> > > > On Tue, Sep 12, 2023 at 12:38:00PM -0700, Tony Dinh wrote:
> > > >
> > > > > I've been testing the boostd for a few Marvell boards and seeing this
> > > > > error on the Thecus N2350 (Marvell Armada 385, dual-core CPU). The
> > > > > "bootflow scan scsi" command triggered the "CACHE: Misaligned
> > > > > operation at range" error. However, this error did not affect the
> > > > > result of the scan, i.e. the bootflow for scsi partition was created
> > > > > correctly, and u-boot is running normally.
> > > > >
> > > > > Enabling CONFIG_SYS_DCACHE_OFF got rid of the errors altogether.
> > > > > Perhaps this is a case where the DCACHE is not required and should be
> > > > > turned off?
> > > > >
> > > > > Please see the log after the break below.
> > > >
> > > > Can you please try -next ?  There's at least one SCSI related cache
> > > > alignment fix there that's not in master, thanks.
> > >
> > > Unfortunately I got the same errors. This time the ranges are
> > > different, of course.
> > >
> > > master:
> > >
> > > N2350 > bootflow scan scsi
> > > CACHE: Misaligned operation at range [3fb99f88, 3fb9a388]
> > > CACHE: Misaligned operation at range [3fb99f88, 3fb9a388]
> > > CACHE: Misaligned operation at range [3fb99f88, 3fb9a388]
> > > ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x3fb99f88
> > > ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x3fb9a388
> > >
> > > next:
> > >
> > > N2350 > bootflow scan scsi
> > > CACHE: Misaligned operation at range [3fb80388, 3fb80788]
> > > CACHE: Misaligned operation at range [3fb80388, 3fb80788]
> > > CACHE: Misaligned operation at range [3fb80388, 3fb80788]
> > > ERROR: v7_outer_cache_inval_range - start address is not aligned - 0x3fb80388
> > > ERROR: v7_outer_cache_inval_range - stop address is not aligned - 0x3fb80788
> >
> > Can you debug to where these calls are so we can align these buffers?
> > See 02660defdc8a ("scsi: Cache align temporary buffer") for an example.
>
> I wonder if we need to use memalign() when allocating memory to read things from the media? But I am not sure which file time is being read, or which bootmeth it is.

Looks like we probably need to align the buffer tempbuff.

/drivers/scsi/scsi.c
static int scsi_detect_dev(struct udevice *dev, int target, int lun,
  struct blk_desc *dev_desc)
{
unsigned char perq, modi;
lbaint_t capacity;
unsigned long blksz;
struct scsi_cmd *pccb = (struct scsi_cmd *)&tempccb;
int count, err;

pccb->target = target;
pccb->lun = lun;
pccb->pdata = (unsigned char *)&tempbuff;
pccb->datalen = 512;

If you look at the log I posted previously, this error shows up during
"bootflow scan scsi".

All the best,
Tony



>
> Regards,
> Simon


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