[PATCH] andes: rearrange defconfig and dts and memory layout for SPL.

[Tom Rini]

On Thu, Sep 14, 2023 at 07:45:49PM +0800, Randolph wrote:

> Modify "CONFIG_AE350" to "CONFIG_ANDES_AE350"
> Unify the memory layout for u-boot SPL.
> 
> Signed-off-by: Randolph <randolph at andestech.com>
> ---
>  arch/riscv/Kconfig                   |  4 +-
>  arch/riscv/dts/Makefile              |  2 +-
>  arch/riscv/dts/ae350-u-boot.dtsi     |  1 +
>  arch/riscv/dts/ae350_32.dts          | 61 ++++++++++++++--------------
>  arch/riscv/dts/ae350_64.dts          |  1 -
>  board/AndesTech/ae350/Kconfig        | 28 ++++++++++++-
>  configs/ae350_rv32_defconfig         |  3 +-
>  configs/ae350_rv32_spl_defconfig     | 21 ++++------
>  configs/ae350_rv32_spl_xip_defconfig | 18 ++++----
>  configs/ae350_rv32_xip_defconfig     |  3 +-
>  configs/ae350_rv64_defconfig         |  3 +-
>  configs/ae350_rv64_spl_defconfig     | 19 ++++-----
>  configs/ae350_rv64_spl_xip_defconfig | 16 ++++----
>  configs/ae350_rv64_xip_defconfig     |  3 +-
>  14 files changed, 101 insertions(+), 82 deletions(-)

This does 3 things and needs to be 3 patches.  First, is renaming
TARGET_AE350 to TARGET_ANDES_AE350 which is fine.  The second is the
memory map changes which also seem fine but are harder to review.  The
third is introducing what to me seems like a different way to implement
SPL_OS_BOOT.  But there's also not a full example of what that part
looks like in this patch.

-- 
Tom
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