[PATCH 1/3] Fix code style for time functions

Simon Glass sjg at chromium.org
Mon Sep 25 04:39:50 CEST 2023


Fix the code style used for some time functions.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/powerpc/lib/interrupts.c   |  2 +-
 arch/powerpc/lib/time.c         |  5 +++--
 board/armltd/integrator/timer.c |  2 +-
 drivers/fpga/ACEX1K.c           |  4 ++--
 drivers/fpga/spartan2.c         | 24 ++++++++++++------------
 drivers/fpga/spartan3.c         | 24 ++++++++++++------------
 post/drivers/rtc.c              |  4 ++--
 7 files changed, 33 insertions(+), 32 deletions(-)

diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index df312dfa28ef..2add2ff95405 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -89,7 +89,7 @@ void timer_interrupt(struct pt_regs *regs)
 #endif /* CONFIG_LED_STATUS */
 }
 
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
 {
 	return (timestamp - base);
 }
diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index 8d6babfb83d6..d27432c23af8 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -39,8 +39,9 @@ unsigned long usec2ticks(unsigned long usec)
  */
 void __udelay(unsigned long usec)
 {
-	ulong ticks = usec2ticks (usec);
-	wait_ticks (ticks);
+	ulong ticks = usec2ticks(usec);
+
+	wait_ticks(ticks);
 }
 
 /* ------------------------------------------------------------------------- */
diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c
index 9db5135a8ffa..a2abfbfc7f3a 100644
--- a/board/armltd/integrator/timer.c
+++ b/board/armltd/integrator/timer.c
@@ -119,7 +119,7 @@ static ulong get_timer_masked (void)
 	return timestamp;
 }
 
-ulong get_timer (ulong base_ticks)
+ulong get_timer(ulong base_ticks)
 {
 	return get_timer_masked () - base_ticks;
 }
diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c
index 4c00cdf0b57d..2e788c7a8ef5 100644
--- a/drivers/fpga/ACEX1K.c
+++ b/drivers/fpga/ACEX1K.c
@@ -135,10 +135,10 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
 		udelay(2);		/* T_cf2st1 < 4us	*/
 
 		/* Wait for nSTATUS to be released (i.e. deasserted) */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for STATUS to go high.\n");
 				(*fn->abort) (cookie);
 				return FPGA_FAIL;
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 6eef87b78e16..dd84e2e8cbb9 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -143,11 +143,11 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 		CFG_FPGA_DELAY ();
 		(*fn->pgm) (false, true, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		/* Now wait for INIT and BUSY to go high */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for INIT to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				return FPGA_FAIL;
@@ -170,7 +170,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 			(*fn->clk) (true, true, cookie);	/* Assert the clock pin */
 
 #ifdef CONFIG_SYS_FPGA_CHECK_BUSY
-			ts = get_timer (0);	/* get current time */
+			ts = get_timer(0);	/* get current time */
 			while ((*fn->busy) (cookie)) {
 				/* XXX - we should have a check in here somewhere to
 				 * make sure we aren't busy forever... */
@@ -180,7 +180,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 				CFG_FPGA_DELAY ();
 				(*fn->clk) (true, true, cookie);	/* Assert the clock pin */
 
-				if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+				if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 					puts ("** Timeout waiting for BUSY to clear.\n");
 					(*fn->abort) (cookie);	/* abort the burn */
 					return FPGA_FAIL;
@@ -203,7 +203,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		while ((*fn->done) (cookie) == FPGA_FAIL) {
 
@@ -212,7 +212,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 			CFG_FPGA_DELAY ();
 			(*fn->clk) (true, true, cookie);	/* Assert the clock pin */
 
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for DONE to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				ret_val = FPGA_FAIL;
@@ -328,10 +328,10 @@ static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 		(*fn->pgm) (true, true, cookie);	/* Assert the program, commit */
 
 		/* Wait for INIT state (init low)                            */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for INIT to start.\n");
 				return FPGA_FAIL;
 			}
@@ -341,11 +341,11 @@ static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 		CFG_FPGA_DELAY ();
 		(*fn->pgm) (false, true, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		/* Now wait for INIT to go high */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for INIT to clear.\n");
 				return FPGA_FAIL;
 			}
@@ -389,7 +389,7 @@ static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		(*fn->wr) (true, true, cookie);
 
@@ -402,7 +402,7 @@ static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 
 			putc ('*');
 
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for DONE to clear.\n");
 				ret_val = FPGA_FAIL;
 				break;
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index e892fa571f19..95d4dd7d78b5 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -148,11 +148,11 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 		CFG_FPGA_DELAY ();
 		(*fn->pgm) (false, true, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		/* Now wait for INIT and BUSY to go high */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for INIT to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				return FPGA_FAIL;
@@ -175,7 +175,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 			(*fn->clk) (true, true, cookie);	/* Assert the clock pin */
 
 #ifdef CONFIG_SYS_FPGA_CHECK_BUSY
-			ts = get_timer (0);	/* get current time */
+			ts = get_timer(0);	/* get current time */
 			while ((*fn->busy) (cookie)) {
 				/* XXX - we should have a check in here somewhere to
 				 * make sure we aren't busy forever... */
@@ -185,7 +185,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 				CFG_FPGA_DELAY ();
 				(*fn->clk) (true, true, cookie);	/* Assert the clock pin */
 
-				if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+				if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 					puts ("** Timeout waiting for BUSY to clear.\n");
 					(*fn->abort) (cookie);	/* abort the burn */
 					return FPGA_FAIL;
@@ -208,7 +208,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		while ((*fn->done) (cookie) == FPGA_FAIL) {
 			/* XXX - we should have a check in here somewhere to
@@ -219,7 +219,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 			CFG_FPGA_DELAY ();
 			(*fn->clk) (true, true, cookie);	/* Assert the clock pin */
 
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for DONE to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				ret_val = FPGA_FAIL;
@@ -335,10 +335,10 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 		(*fn->pgm) (true, true, cookie);	/* Assert the program, commit */
 
 		/* Wait for INIT state (init low)                            */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for INIT to start.\n");
 				if (*fn->abort)
 					(*fn->abort) (cookie);
@@ -350,11 +350,11 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 		CFG_FPGA_DELAY ();
 		(*fn->pgm) (false, true, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		/* Now wait for INIT to go high */
 		do {
 			CFG_FPGA_DELAY ();
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for INIT to clear.\n");
 				if (*fn->abort)
 					(*fn->abort) (cookie);
@@ -406,7 +406,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = get_timer(0);		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		(*fn->wr) (true, true, cookie);
 
@@ -421,7 +421,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 
 			putc ('*');
 
-			if (get_timer (ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
+			if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for DONE to clear.\n");
 				ret_val = FPGA_FAIL;
 				break;
diff --git a/post/drivers/rtc.c b/post/drivers/rtc.c
index cc7a49847ccd..9eeb02794715 100644
--- a/post/drivers/rtc.c
+++ b/post/drivers/rtc.c
@@ -36,11 +36,11 @@ static int rtc_post_skip (ulong * diff)
 	ulong start2;
 
 	rtc_get (&tm1);
-	start1 = get_timer (0);
+	start1 = get_timer(0);
 
 	while (1) {
 		rtc_get (&tm2);
-		start2 = get_timer (0);
+		start2 = get_timer(0);
 		if (tm1.tm_sec != tm2.tm_sec)
 			break;
 		if (start2 - start1 > 1500)
-- 
2.42.0.515.g380fc7ccd1-goog



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