[PATCH 1/1] cmd/exception: support RISC-V compressed instruction

[Leo Liang]

On Thu, Sep 21, 2023 at 10:42:18AM +0200, Heinrich Schuchardt wrote:
> Eliminating the C extension on application processors is under
> discussion.
> 
> Support emitting a compressed instruction. This will lead to an
> illegal instruction exception if the C extension is not implemented.
> 
> For testing build qemu-riscv64_defconfig with CONFIG_RISCV_ISA_C=n
> and run with
> 
>     qemu-system-riscv64 -M virt -bios u-boot -nographic -cpu rv64,c=false
> 
>     => exception compressed
>     Unhandled exception: Illegal instruction
>     EPC: 0000000087731708 RA: 000000008773fe44 TVAL: 0000000000004501
>     EPC: 000000008001b708 RA: 0000000080029e44 reloc adjusted
> 
>     Code: 0b93 0000 0493 0000 0993 0000 f06f ccdf (4501)
> 
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt at canonical.com>
> ---
>  cmd/riscv/exception.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>