[PATCH 2/2] rockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5S

[Kever Yang]

On 2023/8/3 03:49, Jonas Karlman wrote:
> Enable missing PCIe Kconfig options now that PCIe bifurcation is fixed
> to make use of the two on-board RTL8125B and the M.2 slot on NanoPi R5C
> and NanoPi R5S.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi | 4 ++++
>   arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 4 ++++
>   configs/nanopi-r5c-rk3568_defconfig        | 5 +++++
>   configs/nanopi-r5s-rk3568_defconfig        | 6 ++++++
>   4 files changed, 19 insertions(+)
>
> diff --git a/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
> index fe5bc6af4765..c0798e950bb5 100644
> --- a/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
> @@ -1,3 +1,7 @@
>   // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
>   
>   #include "rk3568-nanopi-r5s-u-boot.dtsi"
> +
> +&pcie3x2 {
> +	/delete-property/ vpcie3v3-supply;
> +};
> diff --git a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> index 094e5af6a757..880f8ff91fcb 100644
> --- a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> @@ -14,6 +14,10 @@
>   	};
>   };
>   
> +&pcie3x1 {
> +	/delete-property/ vpcie3v3-supply;
> +};
> +
>   &sdhci {
>   	cap-mmc-highspeed;
>   	mmc-ddr-1_8v;
> diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig
> index badac5805ddb..833cff0e457d 100644
> --- a/configs/nanopi-r5c-rk3568_defconfig
> +++ b/configs/nanopi-r5c-rk3568_defconfig
> @@ -1,5 +1,6 @@
>   CONFIG_ARM=y
>   CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
>   CONFIG_COUNTER_FREQUENCY=24000000
>   CONFIG_ARCH_ROCKCHIP=y
>   CONFIG_TEXT_BASE=0x00a00000
> @@ -17,6 +18,7 @@ CONFIG_SPL_STACK=0x400000
>   CONFIG_DEBUG_UART_BASE=0xFE660000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
>   CONFIG_DEBUG_UART=y
>   CONFIG_FIT=y
>   CONFIG_FIT_VERBOSE=y
> @@ -39,6 +41,7 @@ CONFIG_CMD_GPIO=y
>   CONFIG_CMD_GPT=y
>   CONFIG_CMD_I2C=y
>   CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
>   CONFIG_CMD_USB=y
>   CONFIG_CMD_PMIC=y
>   CONFIG_CMD_REGULATOR=y
> @@ -62,6 +65,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
>   CONFIG_MMC_SDHCI=y
>   CONFIG_MMC_SDHCI_SDMA=y
>   CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_RTL8169=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>   CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>   CONFIG_SPL_PINCTRL=y
> diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig
> index fdcb0c266d83..c278ce083d9a 100644
> --- a/configs/nanopi-r5s-rk3568_defconfig
> +++ b/configs/nanopi-r5s-rk3568_defconfig
> @@ -1,5 +1,6 @@
>   CONFIG_ARM=y
>   CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
>   CONFIG_COUNTER_FREQUENCY=24000000
>   CONFIG_ARCH_ROCKCHIP=y
>   CONFIG_TEXT_BASE=0x00a00000
> @@ -17,6 +18,7 @@ CONFIG_SPL_STACK=0x400000
>   CONFIG_DEBUG_UART_BASE=0xFE660000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
>   CONFIG_DEBUG_UART=y
>   CONFIG_FIT=y
>   CONFIG_FIT_VERBOSE=y
> @@ -39,6 +41,7 @@ CONFIG_CMD_GPIO=y
>   CONFIG_CMD_GPT=y
>   CONFIG_CMD_I2C=y
>   CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
>   CONFIG_CMD_USB=y
>   CONFIG_CMD_PMIC=y
>   CONFIG_CMD_REGULATOR=y
> @@ -62,6 +65,9 @@ CONFIG_MMC_DW_ROCKCHIP=y
>   CONFIG_MMC_SDHCI=y
>   CONFIG_MMC_SDHCI_SDMA=y
>   CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_RTL8169=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>   CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>   CONFIG_SPL_PINCTRL=y