[PATCH 1/3] mtd: spi-nor: Add spi flash lock config option

[Michal Simek]

On 9/28/23 05:49, Venkatesh Yadav Abbarapu wrote:
> Provide an explicit configuration option to disable default "lock"
> of any flash chip which supports locking.

Please also write reason for it. Based on 2/3 and 3/3 I expect you want to save 
some memory.
Another reason could be not expose that functionality to be exposed to users.
Should we also guard sf protect command itself? It could give us additional space.

> 
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> ---
>   drivers/mtd/spi/Kconfig        | 7 +++++++
>   drivers/mtd/spi/spi-nor-core.c | 8 +++++++-
>   2 files changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
> index a9617c6c58..476d848321 100644
> --- a/drivers/mtd/spi/Kconfig
> +++ b/drivers/mtd/spi/Kconfig
> @@ -134,6 +134,13 @@ config SPI_FLASH_BAR
>   	  Bank/Extended address registers are used to access the flash
>   	  which has size > 16MiB in 3-byte addressing.
>   
> +config SPI_FLASH_LOCK
> +	bool "Enable the Locking feature"
> +	default y
> +	help
> +	 Enable the SPI flash lock support. By default this is set to y.
> +	 If you intend not to use the lock support you should say n here.
> +
>   config SPI_FLASH_UNLOCK_ALL
>   	bool "Unlock the entire SPI flash on u-boot startup"
>   	default y
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index 6093277f17..9c51f2b1b0 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -1099,6 +1099,7 @@ static int spansion_erase_non_uniform(struct spi_nor *nor, u32 addr,
>   }
>   #endif
>   
> +#if defined(CONFIG_SPI_FLASH_LOCK)
>   #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
>   /* Write status register and ensure bits in mask match written values */
>   static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
> @@ -1386,6 +1387,7 @@ static int stm_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len)
>   	return stm_is_unlocked_sr(nor, ofs, len, status);
>   }
>   #endif /* CONFIG_SPI_FLASH_STMICRO */
> +#endif
>   
>   static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
>   {
> @@ -1461,6 +1463,7 @@ read_err:
>   	return ret;
>   }
>   
> +#if defined(CONFIG_SPI_FLASH_LOCK)
>   #ifdef CONFIG_SPI_FLASH_SST
>   /*
>    * sst26 flash series has its own block protection implementation:
> @@ -1729,6 +1732,8 @@ sst_write_err:
>   	return ret;
>   }
>   #endif
> +#endif
> +
>   /*
>    * Write an address range to the nor chip.  Data must be written in
>    * FLASH_PAGESIZE chunks.  The address range may be any size provided
> @@ -4103,6 +4108,7 @@ int spi_nor_scan(struct spi_nor *nor)
>   	mtd->_read = spi_nor_read;
>   	mtd->_write = spi_nor_write;
>   
> +#if defined(CONFIG_SPI_FLASH_LOCK)
>   #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
>   	/* NOR protection support for STmicro/Micron chips and similar */
>   	if (JEDEC_MFR(info) == SNOR_MFR_ST ||
> @@ -4126,7 +4132,7 @@ int spi_nor_scan(struct spi_nor *nor)
>   		nor->flash_is_unlocked = sst26_is_unlocked;
>   	}
>   #endif
> -
> +#endif
>   	if (info->flags & USE_FSR)
>   		nor->flags |= SNOR_F_USE_FSR;
>   	if (info->flags & SPI_NOR_HAS_TB)

M