[RFC] rockchip: rk3399: Migrate to use TPL on bob and kevin

[Simon Glass]

Hi Jonas,

On Thu, 1 Aug 2024 at 02:37, Jonas Karlman <jonas at kwiboo.se> wrote:
>
> All Rockchip aarch64 boards, beside bob and kevin, use TPL to initialize
> DRAM and SPL to load FIT with U-Boot proper and TF-A.
>
> Bob and kevin currently does not use TPL and instead initialize DRAM
> in SPL and directly after tries to load FIT with U-Boot proper and TF-A.
>
> This RFC try to migrate bob and kevin to also use TPL to uniform TPL/SPL
> use for all Rockchip aarch64 boards.

Thanks for doing this!

>
> Notes and questions:
> - Is u-boot.rom even used for bob/kevin? It use u-boot-img, yet SPL
>   expect to load FIT and does not permit use of raw imgage.

Yes it does use u-boot.rom

>
>   Q: Can we remove what looks to be a faulty u-boot.rom definition and
>      just use u-boot-rockchip-spi.bin instead?

Maybe, but we do need the image to be the correct size.

>
> - FIT location moved from 0x40000 to 0xE0000 in SPI flash to allow for a
>   larger SPL, up to 256 KiB, same as on other RK3399 boards.
>
>   Q: Can we use this location?, or is there something external that
>     expects fit or u-boot-img at this location?

It should be fine.

>
> Features that is now used:
> - Use of Rockchip aarch64 common bss and stack addresses
> - Checksum/signature check of FIT images in SPL
> - Use of dcache to speed up checksum check in SPL
> - SDMA use for eMMC access to speed up read/write in U-Boot proper
>
> Changes that would be good for future:
> - Include and use pinctrl in SPL

Yes

> - Use dm gpio instead of spl_gpio functions in SPL

Where are you looking for spl_gpio? I'm not seeing it.

>
> I do not have any bob or kevin so this has only been compile tested.
>
> This should be broken down into smaller logical patches if this is
> accepted and works on real hardware.

I forgot that I broke my bob and need to fix it. For kevin (which is
very similar):

before:
06:57 $ ub-int kevin
Building U-Boot in sourcedir for chromebook_kevin
Bootstrapping U-Boot from dir /tmp/b/chromebook_kevin
Writing U-Boot using method em100
Channel 0: LPDDR3, 933MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR3, 933MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride

U-Boot SPL 2024.07-rc4-00009-g0ae095f4664 (Aug 01 2024 - 06:57:12 -0600)
Bloblist at 100000 not found (err=-2)
Trying to boot from SPI
ns16550_serial serial at ff1a0000: pinctrl_select_state_full:
uclass_get_device_by_phandle_id: err=-19


U-Boot 2024.07-rc4-00009-g0ae095f4664 (Aug 01 2024 - 06:57:12 -0600)

Model: Google Kevin
DRAM:  4 GiB (effective 3.9 GiB)
Core:  329 devices, 33 uclasses, devicetree: separate
MMC:   mmc at fe320000: 1, mmc at fe330000: 0
Loading Environment from MMC... Reading from MMC(0)... *** Warning -
bad CRC, using default environment

edp_rockchip dp at ff970000: failed to set rate on clock index 0 (362) (error = -2)
edp_rockchip dp at ff970000: failed to set rate on clock index 0 (362) (error = -2)
In:    serial,cros-ec-keyb
Out:   serial,vidconsole
Err:   serial,vidconsole
Model: Google Kevin
Net:   No ethernet found.

Hit any key to stop autoboot:  0
=>

with your patch:
06:53 $ ub-int kevin
Building U-Boot in sourcedir for chromebook_kevin
Bootstrapping U-Boot from dir /tmp/b/chromebook_kevin
Writing U-Boot using method em100

U-Boot SPL 2024.07-rc4-00010-g14d97804e94 (Aug 01 2024 - 06:53:17 -0600)
Checksum 0 != 68
Bloblist at 100000 not found (err=-5)
Trying to boot from SPI
## Checking hash(es) for config conf-1 ... OK
## Checking hash(es) for Image firmware-1 ... crc32+ OK
## Checking hash(es) for Image fdt-1 ... crc32+ OK
ns16550_serial serial at ff1a0000: pinctrl_select_state_full:
uclass_get_device_by_phandle_id: err=-19


U-Boot 2024.07-rc4-00010-g14d97804e94 (Aug 01 2024 - 06:53:17 -0600)

Model: Google Kevin
DRAM:  4 GiB (effective 3.9 GiB)
Core:  330 devices, 34 uclasses, devicetree: separate
MMC:   mmc at fe320000: 1, mmc at fe330000: 0
Loading Environment from MMC... Reading from MMC(0)... *** Warning -
bad CRC, using default environment

edp_rockchip dp at ff970000: failed to set rate on clock index 0 (362) (error = -2)
edp_rockchip dp at ff970000: failed to set rate on clock index 0 (362) (error = -2)
In:    serial,cros-ec-keyb
Out:   serial,vidconsole
Err:   serial,vidconsole
Model: Google Kevin
Net:   No ethernet found.

Hit any key to stop autoboot:  0
=>

Regards,
SImon